0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Google Herobrine board device tree source
0004 *
0005 * Copyright 2022 Google LLC.
0006 */
0007
0008 /dts-v1/;
0009
0010 #include "sc7280-herobrine.dtsi"
0011
0012 / {
0013 model = "Google Herobrine (rev1+)";
0014 compatible = "google,herobrine", "qcom,sc7280";
0015 };
0016
0017 /*
0018 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
0019 *
0020 * Sort order matches the order in the parent files (parents before children).
0021 */
0022
0023 &pp3300_codec {
0024 status = "okay";
0025 };
0026
0027 &pp3300_fp_mcu {
0028 status = "okay";
0029 };
0030
0031 &pp2850_vcm_wf_cam {
0032 status = "okay";
0033 };
0034
0035 &pp2850_wf_cam {
0036 status = "okay";
0037 };
0038
0039 &pp1800_wf_cam {
0040 status = "okay";
0041 };
0042
0043 &pp1200_wf_cam {
0044 status = "okay";
0045 };
0046
0047 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
0048
0049 &ap_spi_fp {
0050 status = "okay";
0051 };
0052
0053 /*
0054 * Although the trackpad is really part of the herobrine baseboard, we'll
0055 * put the actual definition in the board device tree since different boards
0056 * might hook up different trackpads (or no i2c trackpad at all in the case
0057 * of tablets / detachables).
0058 */
0059 ap_tp_i2c: &i2c0 {
0060 status = "okay";
0061 clock-frequency = <400000>;
0062
0063 trackpad: trackpad@15 {
0064 compatible = "elan,ekth3000";
0065 reg = <0x15>;
0066 pinctrl-names = "default";
0067 pinctrl-0 = <&tp_int_odl>;
0068
0069 interrupt-parent = <&tlmm>;
0070 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
0071
0072 vcc-supply = <&pp3300_z1>;
0073
0074 wakeup-source;
0075 };
0076 };
0077
0078 /*
0079 * The touchscreen connector might come off the Qcard, at least in the case of
0080 * eDP. Like the trackpad, we'll put it in the board device tree file since
0081 * different boards have different touchscreens.
0082 */
0083 ts_i2c: &i2c13 {
0084 status = "okay";
0085 clock-frequency = <400000>;
0086
0087 ap_ts: touchscreen@5c {
0088 compatible = "hid-over-i2c";
0089 reg = <0x5c>;
0090 pinctrl-names = "default";
0091 pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
0092
0093 interrupt-parent = <&tlmm>;
0094 interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
0095
0096 post-power-on-delay-ms = <500>;
0097 hid-descr-addr = <0x0000>;
0098
0099 vdd-supply = <&ts_avdd>;
0100 };
0101 };
0102
0103 &mdss_edp {
0104 status = "okay";
0105 };
0106
0107 &mdss_edp_phy {
0108 status = "okay";
0109 };
0110
0111 /* For nvme */
0112 &pcie1 {
0113 status = "okay";
0114 };
0115
0116 /* For nvme */
0117 &pcie1_phy {
0118 status = "okay";
0119 };
0120
0121 /* For eMMC */
0122 &sdhc_1 {
0123 status = "okay";
0124 };
0125
0126 /* For SD Card */
0127 &sdhc_2 {
0128 status = "okay";
0129 };
0130
0131 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
0132
0133 /*
0134 * This pin goes to the display panel but then doesn't actually do anything
0135 * on the panel itself (it doesn't connect to the touchscreen controller).
0136 * We'll set a pullup here just to park the line.
0137 */
0138 &ts_rst_conn {
0139 bias-pull-up;
0140 };
0141
0142 /* PINCTRL - BOARD-SPECIFIC */
0143
0144 /*
0145 * Methodology for gpio-line-names:
0146 * - If a pin goes to herobrine board and is named it gets that name.
0147 * - If a pin goes to herobrine board and is not named, it gets no name.
0148 * - If a pin is totally internal to Qcard then it gets Qcard name.
0149 * - If a pin is not hooked up on Qcard, it gets no name.
0150 */
0151
0152 &pm8350c_gpios {
0153 gpio-line-names = "FLASH_STROBE_1", /* 1 */
0154 "AP_SUSPEND",
0155 "PM8008_1_RST_N",
0156 "",
0157 "",
0158 "",
0159 "PMIC_EDP_BL_EN",
0160 "PMIC_EDP_BL_PWM",
0161 "";
0162 };
0163
0164 &tlmm {
0165 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
0166 "AP_TP_I2C_SCL",
0167 "SSD_RST_L",
0168 "PE_WAKE_ODL",
0169 "AP_SAR_SDA",
0170 "AP_SAR_SCL",
0171 "PRB_SC_GPIO_6",
0172 "TP_INT_ODL",
0173 "HP_I2C_SDA",
0174 "HP_I2C_SCL",
0175
0176 "GNSS_L1_EN", /* 10 */
0177 "GNSS_L5_EN",
0178 "SPI_AP_MOSI",
0179 "SPI_AP_MISO",
0180 "SPI_AP_CLK",
0181 "SPI_AP_CS0_L",
0182 /*
0183 * AP_FLASH_WP is crossystem ABI. Schematics
0184 * call it BIOS_FLASH_WP_OD.
0185 */
0186 "AP_FLASH_WP",
0187 "",
0188 "AP_EC_INT_L",
0189 "",
0190
0191 "UF_CAM_RST_L", /* 20 */
0192 "WF_CAM_RST_L",
0193 "UART_AP_TX_DBG_RX",
0194 "UART_DBG_TX_AP_RX",
0195 "",
0196 "PM8008_IRQ_1",
0197 "HOST2WLAN_SOL",
0198 "WLAN2HOST_SOL",
0199 "MOS_BT_UART_CTS",
0200 "MOS_BT_UART_RFR",
0201
0202 "MOS_BT_UART_TX", /* 30 */
0203 "MOS_BT_UART_RX",
0204 "PRB_SC_GPIO_32",
0205 "HUB_RST_L",
0206 "",
0207 "",
0208 "AP_SPI_FP_MISO",
0209 "AP_SPI_FP_MOSI",
0210 "AP_SPI_FP_CLK",
0211 "AP_SPI_FP_CS_L",
0212
0213 "AP_EC_SPI_MISO", /* 40 */
0214 "AP_EC_SPI_MOSI",
0215 "AP_EC_SPI_CLK",
0216 "AP_EC_SPI_CS_L",
0217 "LCM_RST_L",
0218 "EARLY_EUD_N",
0219 "",
0220 "DP_HOT_PLUG_DET",
0221 "IO_BRD_MLB_ID0",
0222 "IO_BRD_MLB_ID1",
0223
0224 "IO_BRD_MLB_ID2", /* 50 */
0225 "SSD_EN",
0226 "TS_I2C_SDA_CONN",
0227 "TS_I2C_CLK_CONN",
0228 "TS_RST_CONN",
0229 "TS_INT_CONN",
0230 "AP_I2C_TPM_SDA",
0231 "AP_I2C_TPM_SCL",
0232 "PRB_SC_GPIO_58",
0233 "PRB_SC_GPIO_59",
0234
0235 "EDP_HOT_PLUG_DET_N", /* 60 */
0236 "FP_TO_AP_IRQ_L",
0237 "",
0238 "AMP_EN",
0239 "CAM0_MCLK_GPIO_64",
0240 "CAM1_MCLK_GPIO_65",
0241 "WF_CAM_MCLK",
0242 "PRB_SC_GPIO_67",
0243 "FPMCU_BOOT0",
0244 "UF_CAM_SDA",
0245
0246 "UF_CAM_SCL", /* 70 */
0247 "",
0248 "",
0249 "WF_CAM_SDA",
0250 "WF_CAM_SCL",
0251 "",
0252 "",
0253 "EN_FP_RAILS",
0254 "FP_RST_L",
0255 "PCIE1_CLKREQ_ODL",
0256
0257 "EN_PP3300_DX_EDP", /* 80 */
0258 "SC_GPIO_81",
0259 "FORCED_USB_BOOT",
0260 "WCD_RESET_N",
0261 "MOS_WLAN_EN",
0262 "MOS_BT_EN",
0263 "MOS_SW_CTRL",
0264 "MOS_PCIE0_RST",
0265 "MOS_PCIE0_CLKREQ_N",
0266 "MOS_PCIE0_WAKE_N",
0267
0268 "MOS_LAA_AS_EN", /* 90 */
0269 "SD_CD_ODL",
0270 "",
0271 "",
0272 "MOS_BT_WLAN_SLIMBUS_CLK",
0273 "MOS_BT_WLAN_SLIMBUS_DAT0",
0274 "HP_MCLK",
0275 "HP_BCLK",
0276 "HP_DOUT",
0277 "HP_DIN",
0278
0279 "HP_LRCLK", /* 100 */
0280 "HP_IRQ",
0281 "",
0282 "",
0283 "GSC_AP_INT_ODL",
0284 "EN_PP3300_CODEC",
0285 "AMP_BCLK",
0286 "AMP_DIN",
0287 "AMP_LRCLK",
0288 "UIM1_DATA_GPIO_109",
0289
0290 "UIM1_CLK_GPIO_110", /* 110 */
0291 "UIM1_RESET_GPIO_111",
0292 "PRB_SC_GPIO_112",
0293 "UIM0_DATA",
0294 "UIM0_CLK",
0295 "UIM0_RST",
0296 "UIM0_PRESENT_ODL",
0297 "SDM_RFFE0_CLK",
0298 "SDM_RFFE0_DATA",
0299 "WF_CAM_EN",
0300
0301 "FASTBOOT_SEL_0", /* 120 */
0302 "SC_GPIO_121",
0303 "FASTBOOT_SEL_1",
0304 "SC_GPIO_123",
0305 "FASTBOOT_SEL_2",
0306 "SM_RFFE4_CLK_GRFC_8",
0307 "SM_RFFE4_DATA_GRFC_9",
0308 "WLAN_COEX_UART1_RX",
0309 "WLAN_COEX_UART1_TX",
0310 "PRB_SC_GPIO_129",
0311
0312 "LCM_ID0", /* 130 */
0313 "LCM_ID1",
0314 "",
0315 "SDR_QLINK_REQ",
0316 "SDR_QLINK_EN",
0317 "QLINK0_WMSS_RESET_N",
0318 "SMR526_QLINK1_REQ",
0319 "SMR526_QLINK1_EN",
0320 "SMR526_QLINK1_WMSS_RESET_N",
0321 "PRB_SC_GPIO_139",
0322
0323 "SAR1_IRQ_ODL", /* 140 */
0324 "SAR0_IRQ_ODL",
0325 "PRB_SC_GPIO_142",
0326 "",
0327 "WCD_SWR_TX_CLK",
0328 "WCD_SWR_TX_DATA0",
0329 "WCD_SWR_TX_DATA1",
0330 "WCD_SWR_RX_CLK",
0331 "WCD_SWR_RX_DATA0",
0332 "WCD_SWR_RX_DATA1",
0333
0334 "DMIC01_CLK", /* 150 */
0335 "DMIC01_DATA",
0336 "DMIC23_CLK",
0337 "DMIC23_DATA",
0338 "",
0339 "",
0340 "EC_IN_RW_ODL",
0341 "HUB_EN",
0342 "WCD_SWR_TX_DATA2",
0343 "",
0344
0345 "", /* 160 */
0346 "",
0347 "",
0348 "",
0349 "",
0350 "",
0351 "",
0352 "",
0353 "",
0354 "",
0355
0356 "", /* 170 */
0357 "MOS_BLE_UART_TX",
0358 "MOS_BLE_UART_RX",
0359 "",
0360 "",
0361 "";
0362 };
