0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Copyright (C) 2021 MediaTek Inc.
0004 * Author: Sam.Shih <sam.shih@mediatek.com>
0005 */
0006
0007 /dts-v1/;
0008 #include "mt7986b.dtsi"
0009
0010 / {
0011 model = "MediaTek MT7986b RFB";
0012 compatible = "mediatek,mt7986b-rfb";
0013
0014 aliases {
0015 serial0 = &uart0;
0016 };
0017
0018 chosen {
0019 stdout-path = "serial0:115200n8";
0020 };
0021
0022 memory@40000000 {
0023 device_type = "memory";
0024 reg = <0 0x40000000 0 0x40000000>;
0025 };
0026 };
0027
0028 &uart0 {
0029 status = "okay";
0030 };
0031
0032 ð {
0033 status = "okay";
0034
0035 gmac0: mac@0 {
0036 compatible = "mediatek,eth-mac";
0037 reg = <0>;
0038 phy-mode = "2500base-x";
0039
0040 fixed-link {
0041 speed = <2500>;
0042 full-duplex;
0043 pause;
0044 };
0045 };
0046
0047 mdio: mdio-bus {
0048 #address-cells = <1>;
0049 #size-cells = <0>;
0050
0051 switch@0 {
0052 compatible = "mediatek,mt7531";
0053 reg = <31>;
0054 reset-gpios = <&pio 5 0>;
0055
0056 ports {
0057 #address-cells = <1>;
0058 #size-cells = <0>;
0059
0060 port@0 {
0061 reg = <0>;
0062 label = "lan0";
0063 };
0064
0065 port@1 {
0066 reg = <1>;
0067 label = "lan1";
0068 };
0069
0070 port@2 {
0071 reg = <2>;
0072 label = "lan2";
0073 };
0074
0075 port@3 {
0076 reg = <3>;
0077 label = "lan3";
0078 };
0079
0080 port@4 {
0081 reg = <4>;
0082 label = "lan4";
0083 };
0084
0085 port@6 {
0086 reg = <6>;
0087 label = "cpu";
0088 ethernet = <&gmac0>;
0089 phy-mode = "2500base-x";
0090
0091 fixed-link {
0092 speed = <2500>;
0093 full-duplex;
0094 pause;
0095 };
0096 };
0097 };
0098 };
0099 };
0100 };