0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (C) 2016 Marvell Technology Group Ltd.
0004 *
0005 * Device Tree file for the Armada 8040 SoC, made of an AP806 Quad and
0006 * two CP110.
0007 */
0008
0009 #include "armada-ap806-quad.dtsi"
0010 #include "armada-80x0.dtsi"
0011
0012 / {
0013 model = "Marvell Armada 8040";
0014 compatible = "marvell,armada8040", "marvell,armada-ap806-quad",
0015 "marvell,armada-ap806";
0016 };
0017
0018 &cp0_pcie0 {
0019 iommu-map =
0020 <0x0 &smmu 0x480 0x20>,
0021 <0x100 &smmu 0x4a0 0x20>,
0022 <0x200 &smmu 0x4c0 0x20>;
0023 iommu-map-mask = <0x031f>;
0024 };
0025
0026 /* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock
0027 * in CP master is not connected (by package) to the oscillator. So
0028 * disable it. However, the RTC clock in CP slave is connected to the
0029 * oscillator so this one is let enabled.
0030 */
0031 &cp0_rtc {
0032 status = "disabled";
0033 };
0034
0035 &cp0_sata0 {
0036 iommus = <&smmu 0x444>;
0037 };
0038
0039 &cp0_sdhci0 {
0040 iommus = <&smmu 0x445>;
0041 };
0042
0043 &cp0_usb3_0 {
0044 iommus = <&smmu 0x440>;
0045 };
0046
0047 &cp0_usb3_1 {
0048 iommus = <&smmu 0x441>;
0049 };
0050
0051 &cp1_sata0 {
0052 iommus = <&smmu 0x454>;
0053 };
0054
0055 &cp1_usb3_0 {
0056 iommus = <&smmu 0x450>;
0057 };
0058
0059 &cp1_usb3_1 {
0060 iommus = <&smmu 0x451>;
0061 };
