dts/freescale/imx93-11x11-evk.dts

0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003  * Copyright 2022 NXP
0004  */
0005
0006 /dts-v1/;
0007
0008 #include "imx93.dtsi"
0009
0010 / {
0011         model = "NXP i.MX93 11X11 EVK board";
0012         compatible = "fsl,imx93-11x11-evk", "fsl,imx93";
0013
0014         chosen {
0015                 stdout-path = &lpuart1;
0016         };
0017
0018         reg_usdhc2_vmmc: regulator-usdhc2 {
0019                 compatible = "regulator-fixed";
0020                 pinctrl-names = "default";
0021                 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
0022                 regulator-name = "VSD_3V3";
0023                 regulator-min-microvolt = <3300000>;
0024                 regulator-max-microvolt = <3300000>;
0025                 gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
0026                 enable-active-high;
0027         };
0028 };
0029
0030 &mu1 {
0031         status = "okay";
0032 };
0033
0034 &mu2 {
0035         status = "okay";
0036 };
0037
0038 &lpuart1 { /* console */
0039         pinctrl-names = "default";
0040         pinctrl-0 = <&pinctrl_uart1>;
0041         status = "okay";
0042 };
0043
0044 &usdhc1 {
0045         pinctrl-names = "default", "state_100mhz", "state_200mhz";
0046         pinctrl-0 = <&pinctrl_usdhc1>;
0047         pinctrl-1 = <&pinctrl_usdhc1>;
0048         pinctrl-2 = <&pinctrl_usdhc1>;
0049         bus-width = <8>;
0050         non-removable;
0051         status = "okay";
0052 };
0053
0054 &usdhc2 {
0055         pinctrl-names = "default", "state_100mhz", "state_200mhz";
0056         pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
0057         pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
0058         pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
0059         cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
0060         vmmc-supply = <&reg_usdhc2_vmmc>;
0061         bus-width = <4>;
0062         status = "okay";
0063         no-sdio;
0064         no-mmc;
0065 };
0066
0067 &iomuxc {
0068         pinctrl_uart1: uart1grp {
0069                 fsl,pins = <
0070                         MX93_PAD_UART1_RXD__LPUART1_RX                  0x31e
0071                         MX93_PAD_UART1_TXD__LPUART1_TX                  0x31e
0072                 >;
0073         };
0074
0075         pinctrl_usdhc1: usdhc1grp {
0076                 fsl,pins = <
0077                         MX93_PAD_SD1_CLK__USDHC1_CLK            0x17fe
0078                         MX93_PAD_SD1_CMD__USDHC1_CMD            0x13fe
0079                         MX93_PAD_SD1_DATA0__USDHC1_DATA0        0x13fe
0080                         MX93_PAD_SD1_DATA1__USDHC1_DATA1        0x13fe
0081                         MX93_PAD_SD1_DATA2__USDHC1_DATA2        0x13fe
0082                         MX93_PAD_SD1_DATA3__USDHC1_DATA3        0x13fe
0083                         MX93_PAD_SD1_DATA4__USDHC1_DATA4        0x13fe
0084                         MX93_PAD_SD1_DATA5__USDHC1_DATA5        0x13fe
0085                         MX93_PAD_SD1_DATA6__USDHC1_DATA6        0x13fe
0086                         MX93_PAD_SD1_DATA7__USDHC1_DATA7        0x13fe
0087                         MX93_PAD_SD1_STROBE__USDHC1_STROBE      0x17fe
0088                 >;
0089         };
0090
0091         pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
0092                 fsl,pins = <
0093                         MX93_PAD_SD2_RESET_B__GPIO3_IO07        0x31e
0094                 >;
0095         };
0096
0097         pinctrl_usdhc2_gpio: usdhc2gpiogrp {
0098                 fsl,pins = <
0099                         MX93_PAD_SD2_CD_B__GPIO3_IO00           0x31e
0100                 >;
0101         };
0102
0103         pinctrl_usdhc2: usdhc2grp {
0104                 fsl,pins = <
0105                         MX93_PAD_SD2_CLK__USDHC2_CLK            0x17fe
0106                         MX93_PAD_SD2_CMD__USDHC2_CMD            0x13fe
0107                         MX93_PAD_SD2_DATA0__USDHC2_DATA0        0x13fe
0108                         MX93_PAD_SD2_DATA1__USDHC2_DATA1        0x13fe
0109                         MX93_PAD_SD2_DATA2__USDHC2_DATA2        0x13fe
0110                         MX93_PAD_SD2_DATA3__USDHC2_DATA3        0x13fe
0111                         MX93_PAD_SD2_VSELECT__USDHC2_VSELECT    0x51e
0112                 >;
0113         };
0114 };