0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Copyright (C) 2019 Zodiac Inflight Innovations
0004 */
0005
0006 /dts-v1/;
0007
0008 #include "imx8mq-zii-ultra.dtsi"
0009
0010 / {
0011 model = "ZII Ultra RMB3 Board";
0012 compatible = "zii,imx8mq-ultra-rmb3", "zii,imx8mq-ultra", "fsl,imx8mq";
0013
0014 sound1 {
0015 compatible = "simple-audio-card";
0016 simple-audio-card,name = "front";
0017 simple-audio-card,format = "i2s";
0018 simple-audio-card,bitclock-master = <&sound1_codec>;
0019 simple-audio-card,frame-master = <&sound1_codec>;
0020 simple-audio-card,widgets =
0021 "Headphone", "Headphone Jack Front";
0022 simple-audio-card,routing =
0023 "Headphone Jack Front", "HPA1 HPLEFT",
0024 "Headphone Jack Front", "HPA1 HPRIGHT",
0025 "HPA1 LEFTIN", "HPL",
0026 "HPA1 RIGHTIN", "HPR";
0027 simple-audio-card,aux-devs = <&hpa1>;
0028
0029 sound1_cpu: simple-audio-card,cpu {
0030 sound-dai = <&sai2>;
0031 };
0032
0033 sound1_codec: simple-audio-card,codec {
0034 sound-dai = <&codec1>;
0035 clocks = <&cs2000>;
0036 };
0037 };
0038
0039 sound2 {
0040 compatible = "simple-audio-card";
0041 simple-audio-card,name = "periph";
0042 simple-audio-card,format = "i2s";
0043 simple-audio-card,bitclock-master = <&sound2_codec>;
0044 simple-audio-card,frame-master = <&sound2_codec>;
0045 simple-audio-card,widgets =
0046 "Headphone", "Headphone Jack Back";
0047 simple-audio-card,routing =
0048 "Headphone Jack Back", "HPA1 HPLEFT",
0049 "Headphone Jack Back", "HPA1 HPRIGHT",
0050 "HPA1 LEFTIN", "HPL",
0051 "HPA1 RIGHTIN", "HPR";
0052 simple-audio-card,aux-devs = <&hpa2>;
0053
0054 sound2_cpu: simple-audio-card,cpu {
0055 sound-dai = <&sai3>;
0056 };
0057
0058 sound2_codec: simple-audio-card,codec {
0059 sound-dai = <&codec2>;
0060 clocks = <&cs2000>;
0061 };
0062 };
0063 };
0064
0065 &ecspi1 {
0066 pinctrl-names = "default";
0067 pinctrl-0 = <&pinctrl_ecspi1>;
0068 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
0069 status = "okay";
0070 #address-cells = <1>;
0071 #size-cells = <0>;
0072
0073 nor_flash: flash@0 {
0074 compatible = "st,n25q128a13", "jedec,spi-nor";
0075 spi-max-frequency = <20000000>;
0076 reg = <0>;
0077 };
0078 };
0079
0080 &hpa2 {
0081 sound-name-prefix = "HPA1";
0082 };
0083
0084 &i2c1 {
0085 codec2: codec@18 {
0086 compatible = "ti,tlv320dac3100";
0087 pinctrl-names = "default";
0088 pinctrl-0 = <&pinctrl_codec2>;
0089 reg = <0x18>;
0090 #sound-dai-cells = <0>;
0091 HPVDD-supply = <®_gen_3p3>;
0092 SPRVDD-supply = <®_gen_3p3>;
0093 SPLVDD-supply = <®_gen_3p3>;
0094 AVDD-supply = <®_gen_3p3>;
0095 IOVDD-supply = <®_gen_3p3>;
0096 DVDD-supply = <&vgen4_reg>;
0097 reset-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
0098 };
0099 };
0100
0101 &i2c2 {
0102 temp-sense@48 {
0103 compatible = "national,lm75";
0104 reg = <0x48>;
0105 };
0106 };
0107
0108 &i2c4 {
0109 touchscreen@20 {
0110 compatible = "syna,rmi4-i2c";
0111 pinctrl-names = "default";
0112 pinctrl-0 = <&pinctrl_ts>;
0113 reg = <0x20>;
0114 interrupt-parent = <&gpio1>;
0115 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
0116
0117 #address-cells = <1>;
0118 #size-cells = <0>;
0119
0120 rmi4-f01@1 {
0121 reg = <0x1>;
0122 syna,nosleep-mode = <2>;
0123 };
0124
0125 rmi4-f11@11 {
0126 reg = <0x11>;
0127 touchscreen-inverted-x;
0128 touchscreen-swapped-x-y;
0129 syna,sensor-type = <1>;
0130 syna,delta-x-threshold = <5>;
0131 syna,delta-y-threshold = <10>;
0132 };
0133
0134 rmi4-f12@12 {
0135 reg = <0x12>;
0136 touchscreen-inverted-x;
0137 touchscreen-swapped-x-y;
0138 syna,sensor-type = <1>;
0139 };
0140 };
0141
0142 touchscreen@2a {
0143 compatible = "eeti,exc3000";
0144 pinctrl-names = "default";
0145 pinctrl-0 = <&pinctrl_ts>;
0146 reg = <0x2a>;
0147 interrupt-parent = <&gpio1>;
0148 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
0149 touchscreen-inverted-x;
0150 touchscreen-swapped-x-y;
0151 status = "disabled";
0152 };
0153 };
0154
0155 &sai3 {
0156 pinctrl-names = "default";
0157 pinctrl-0 = <&pinctrl_sai3>;
0158 status = "okay";
0159 };
0160
0161 &usbhub {
0162 swap-dx-lanes = <0>;
0163 };
0164
0165 &iomuxc {
0166 pinctrl_codec2: dac2grp {
0167 fsl,pins = <
0168 MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x41
0169 >;
0170 };
0171
0172 pinctrl_ecspi1: ecspi1grp {
0173 fsl,pins = <
0174 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
0175 MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
0176 MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
0177 MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
0178 >;
0179 };
0180
0181 pinctrl_sai3: sai3grp {
0182 fsl,pins = <
0183 MX8MQ_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
0184 MX8MQ_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
0185 MX8MQ_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
0186 >;
0187 };
0188 };