0001 // SPDX-License-Identifier: GPL-2.0+ OR MIT
0002 /*
0003 * Copyright (C) 2019 Kontron Electronics GmbH
0004 */
0005
0006 #include "imx8mm.dtsi"
0007
0008 / {
0009 model = "Kontron i.MX8MM N801X SoM";
0010 compatible = "kontron,imx8mm-n801x-som", "fsl,imx8mm";
0011
0012 memory@40000000 {
0013 device_type = "memory";
0014 /*
0015 * There are multiple SoM flavors with different DDR sizes.
0016 * The smallest is 1GB. For larger sizes the bootloader will
0017 * update the reg property.
0018 */
0019 reg = <0x0 0x40000000 0 0x80000000>;
0020 };
0021
0022 chosen {
0023 stdout-path = &uart3;
0024 };
0025 };
0026
0027 &A53_0 {
0028 cpu-supply = <®_vdd_arm>;
0029 };
0030
0031 &A53_1 {
0032 cpu-supply = <®_vdd_arm>;
0033 };
0034
0035 &A53_2 {
0036 cpu-supply = <®_vdd_arm>;
0037 };
0038
0039 &A53_3 {
0040 cpu-supply = <®_vdd_arm>;
0041 };
0042
0043 &ddrc {
0044 operating-points-v2 = <&ddrc_opp_table>;
0045
0046 ddrc_opp_table: opp-table {
0047 compatible = "operating-points-v2";
0048
0049 opp-25M {
0050 opp-hz = /bits/ 64 <25000000>;
0051 };
0052
0053 opp-100M {
0054 opp-hz = /bits/ 64 <100000000>;
0055 };
0056
0057 opp-750M {
0058 opp-hz = /bits/ 64 <750000000>;
0059 };
0060 };
0061 };
0062
0063 &ecspi1 {
0064 pinctrl-names = "default";
0065 pinctrl-0 = <&pinctrl_ecspi1>;
0066 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
0067 status = "okay";
0068
0069 flash@0 {
0070 compatible = "mxicy,mx25r1635f", "jedec,spi-nor";
0071 spi-max-frequency = <80000000>;
0072 reg = <0>;
0073 };
0074 };
0075
0076 &i2c1 {
0077 clock-frequency = <400000>;
0078 pinctrl-names = "default";
0079 pinctrl-0 = <&pinctrl_i2c1>;
0080 status = "okay";
0081
0082 pca9450: pmic@25 {
0083 compatible = "nxp,pca9450a";
0084 reg = <0x25>;
0085 pinctrl-names = "default";
0086 pinctrl-0 = <&pinctrl_pmic>;
0087 interrupt-parent = <&gpio1>;
0088 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
0089 sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
0090
0091 regulators {
0092 reg_vdd_soc: BUCK1 {
0093 regulator-name = "buck1";
0094 regulator-min-microvolt = <800000>;
0095 regulator-max-microvolt = <850000>;
0096 regulator-boot-on;
0097 regulator-always-on;
0098 regulator-ramp-delay = <3125>;
0099 nxp,dvs-run-voltage = <850000>;
0100 nxp,dvs-standby-voltage = <800000>;
0101 };
0102
0103 reg_vdd_arm: BUCK2 {
0104 regulator-name = "buck2";
0105 regulator-min-microvolt = <850000>;
0106 regulator-max-microvolt = <950000>;
0107 regulator-boot-on;
0108 regulator-always-on;
0109 regulator-ramp-delay = <3125>;
0110 nxp,dvs-run-voltage = <950000>;
0111 nxp,dvs-standby-voltage = <850000>;
0112 };
0113
0114 reg_vdd_dram: BUCK3 {
0115 regulator-name = "buck3";
0116 regulator-min-microvolt = <850000>;
0117 regulator-max-microvolt = <950000>;
0118 regulator-boot-on;
0119 regulator-always-on;
0120 };
0121
0122 reg_vdd_3v3: BUCK4 {
0123 regulator-name = "buck4";
0124 regulator-min-microvolt = <3300000>;
0125 regulator-max-microvolt = <3300000>;
0126 regulator-boot-on;
0127 regulator-always-on;
0128 };
0129
0130 reg_vdd_1v8: BUCK5 {
0131 regulator-name = "buck5";
0132 regulator-min-microvolt = <1800000>;
0133 regulator-max-microvolt = <1800000>;
0134 regulator-boot-on;
0135 regulator-always-on;
0136 };
0137
0138 reg_nvcc_dram: BUCK6 {
0139 regulator-name = "buck6";
0140 regulator-min-microvolt = <1100000>;
0141 regulator-max-microvolt = <1100000>;
0142 regulator-boot-on;
0143 regulator-always-on;
0144 };
0145
0146 reg_nvcc_snvs: LDO1 {
0147 regulator-name = "ldo1";
0148 regulator-min-microvolt = <1800000>;
0149 regulator-max-microvolt = <1800000>;
0150 regulator-boot-on;
0151 regulator-always-on;
0152 };
0153
0154 reg_vdd_snvs: LDO2 {
0155 regulator-name = "ldo2";
0156 regulator-min-microvolt = <800000>;
0157 regulator-max-microvolt = <900000>;
0158 regulator-boot-on;
0159 regulator-always-on;
0160 };
0161
0162 reg_vdda: LDO3 {
0163 regulator-name = "ldo3";
0164 regulator-min-microvolt = <1800000>;
0165 regulator-max-microvolt = <1800000>;
0166 regulator-boot-on;
0167 regulator-always-on;
0168 };
0169
0170 reg_vdd_phy: LDO4 {
0171 regulator-name = "ldo4";
0172 regulator-min-microvolt = <900000>;
0173 regulator-max-microvolt = <900000>;
0174 regulator-boot-on;
0175 regulator-always-on;
0176 };
0177
0178 reg_nvcc_sd: LDO5 {
0179 regulator-name = "ldo5";
0180 regulator-min-microvolt = <1800000>;
0181 regulator-max-microvolt = <3300000>;
0182 };
0183 };
0184 };
0185 };
0186
0187 &uart3 { /* console */
0188 pinctrl-names = "default";
0189 pinctrl-0 = <&pinctrl_uart3>;
0190 status = "okay";
0191 };
0192
0193 &usdhc1 {
0194 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0195 pinctrl-0 = <&pinctrl_usdhc1>;
0196 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
0197 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
0198 vmmc-supply = <®_vdd_3v3>;
0199 vqmmc-supply = <®_vdd_1v8>;
0200 bus-width = <8>;
0201 non-removable;
0202 status = "okay";
0203 };
0204
0205 &wdog1 {
0206 pinctrl-names = "default";
0207 pinctrl-0 = <&pinctrl_wdog>;
0208 fsl,ext-reset-output;
0209 status = "okay";
0210 };
0211
0212 &iomuxc {
0213 pinctrl_ecspi1: ecspi1grp {
0214 fsl,pins = <
0215 MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
0216 MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
0217 MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
0218 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
0219 >;
0220 };
0221
0222 pinctrl_i2c1: i2c1grp {
0223 fsl,pins = <
0224 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
0225 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
0226 >;
0227 };
0228
0229 pinctrl_pmic: pmicgrp {
0230 fsl,pins = <
0231 MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
0232 MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141
0233 >;
0234 };
0235
0236 pinctrl_uart3: uart3grp {
0237 fsl,pins = <
0238 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
0239 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
0240 >;
0241 };
0242
0243 pinctrl_usdhc1: usdhc1grp {
0244 fsl,pins = <
0245 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
0246 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
0247 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
0248 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
0249 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
0250 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
0251 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0
0252 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0
0253 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0
0254 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0
0255 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
0256 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x190
0257 >;
0258 };
0259
0260 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
0261 fsl,pins = <
0262 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
0263 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
0264 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
0265 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
0266 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
0267 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
0268 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4
0269 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4
0270 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4
0271 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4
0272 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
0273 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x194
0274 >;
0275 };
0276
0277 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
0278 fsl,pins = <
0279 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
0280 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
0281 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
0282 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
0283 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
0284 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
0285 MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6
0286 MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6
0287 MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6
0288 MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6
0289 MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019
0290 MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x196
0291 >;
0292 };
0293
0294 pinctrl_wdog: wdoggrp {
0295 fsl,pins = <
0296 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
0297 >;
0298 };
0299 };
