0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 //
0003 // Device Tree file for LX2160AQDS
0004 //
0005 // Copyright 2018 NXP
0006
0007 /dts-v1/;
0008
0009 #include "fsl-lx2160a.dtsi"
0010
0011 / {
0012 model = "NXP Layerscape LX2160AQDS";
0013 compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
0014
0015 aliases {
0016 crypto = &crypto;
0017 mmc0 = &esdhc0;
0018 mmc1 = &esdhc1;
0019 serial0 = &uart0;
0020 };
0021
0022 chosen {
0023 stdout-path = "serial0:115200n8";
0024 };
0025
0026 sb_3v3: regulator-sb3v3 {
0027 compatible = "regulator-fixed";
0028 regulator-name = "MC34717-3.3VSB";
0029 regulator-min-microvolt = <3300000>;
0030 regulator-max-microvolt = <3300000>;
0031 regulator-boot-on;
0032 regulator-always-on;
0033 };
0034
0035 mdio-mux-1 {
0036 compatible = "mdio-mux-multiplexer";
0037 mux-controls = <&mux 0>;
0038 mdio-parent-bus = <&emdio1>;
0039 #address-cells = <1>;
0040 #size-cells = <0>;
0041
0042 mdio@0 { /* On-board PHY #1 RGMI1*/
0043 reg = <0x00>;
0044 #address-cells = <1>;
0045 #size-cells = <0>;
0046 };
0047
0048 mdio@8 { /* On-board PHY #2 RGMI2*/
0049 reg = <0x8>;
0050 #address-cells = <1>;
0051 #size-cells = <0>;
0052 };
0053
0054 mdio@18 { /* Slot #1 */
0055 reg = <0x18>;
0056 #address-cells = <1>;
0057 #size-cells = <0>;
0058 };
0059
0060 mdio@19 { /* Slot #2 */
0061 reg = <0x19>;
0062 #address-cells = <1>;
0063 #size-cells = <0>;
0064 };
0065
0066 mdio@1a { /* Slot #3 */
0067 reg = <0x1a>;
0068 #address-cells = <1>;
0069 #size-cells = <0>;
0070 };
0071
0072 mdio@1b { /* Slot #4 */
0073 reg = <0x1b>;
0074 #address-cells = <1>;
0075 #size-cells = <0>;
0076 };
0077
0078 mdio@1c { /* Slot #5 */
0079 reg = <0x1c>;
0080 #address-cells = <1>;
0081 #size-cells = <0>;
0082 };
0083
0084 mdio@1d { /* Slot #6 */
0085 reg = <0x1d>;
0086 #address-cells = <1>;
0087 #size-cells = <0>;
0088 };
0089
0090 mdio@1e { /* Slot #7 */
0091 reg = <0x1e>;
0092 #address-cells = <1>;
0093 #size-cells = <0>;
0094 };
0095
0096 mdio@1f { /* Slot #8 */
0097 reg = <0x1f>;
0098 #address-cells = <1>;
0099 #size-cells = <0>;
0100 };
0101 };
0102
0103 mdio-mux-2 {
0104 compatible = "mdio-mux-multiplexer";
0105 mux-controls = <&mux 1>;
0106 mdio-parent-bus = <&emdio2>;
0107 #address-cells = <1>;
0108 #size-cells = <0>;
0109
0110 mdio@0 { /* Slot #1 (secondary EMI) */
0111 reg = <0x00>;
0112 #address-cells = <1>;
0113 #size-cells = <0>;
0114 };
0115
0116 mdio@1 { /* Slot #2 (secondary EMI) */
0117 reg = <0x01>;
0118 #address-cells = <1>;
0119 #size-cells = <0>;
0120 };
0121
0122 mdio@2 { /* Slot #3 (secondary EMI) */
0123 reg = <0x02>;
0124 #address-cells = <1>;
0125 #size-cells = <0>;
0126 };
0127
0128 mdio@3 { /* Slot #4 (secondary EMI) */
0129 reg = <0x03>;
0130 #address-cells = <1>;
0131 #size-cells = <0>;
0132 };
0133
0134 mdio@4 { /* Slot #5 (secondary EMI) */
0135 reg = <0x04>;
0136 #address-cells = <1>;
0137 #size-cells = <0>;
0138 };
0139
0140 mdio@5 { /* Slot #6 (secondary EMI) */
0141 reg = <0x05>;
0142 #address-cells = <1>;
0143 #size-cells = <0>;
0144 };
0145
0146 mdio@6 { /* Slot #7 (secondary EMI) */
0147 reg = <0x06>;
0148 #address-cells = <1>;
0149 #size-cells = <0>;
0150 };
0151
0152 mdio@7 { /* Slot #8 (secondary EMI) */
0153 reg = <0x07>;
0154 #address-cells = <1>;
0155 #size-cells = <0>;
0156 };
0157 };
0158 };
0159
0160 &can0 {
0161 status = "okay";
0162 };
0163
0164 &can1 {
0165 status = "okay";
0166 };
0167
0168 &crypto {
0169 status = "okay";
0170 };
0171
0172 &dspi0 {
0173 status = "okay";
0174
0175 dflash0: flash@0 {
0176 #address-cells = <1>;
0177 #size-cells = <1>;
0178 compatible = "jedec,spi-nor";
0179 reg = <0>;
0180 spi-max-frequency = <1000000>;
0181 };
0182 };
0183
0184 &dspi1 {
0185 status = "okay";
0186
0187 dflash1: flash@0 {
0188 #address-cells = <1>;
0189 #size-cells = <1>;
0190 compatible = "jedec,spi-nor";
0191 reg = <0>;
0192 spi-max-frequency = <1000000>;
0193 };
0194 };
0195
0196 &dspi2 {
0197 status = "okay";
0198
0199 dflash2: flash@0 {
0200 #address-cells = <1>;
0201 #size-cells = <1>;
0202 compatible = "jedec,spi-nor";
0203 reg = <0>;
0204 spi-max-frequency = <1000000>;
0205 };
0206 };
0207
0208 &emdio1 {
0209 status = "okay";
0210 };
0211
0212 &emdio2 {
0213 status = "okay";
0214 };
0215
0216 &esdhc0 {
0217 status = "okay";
0218 };
0219
0220 &esdhc1 {
0221 status = "okay";
0222 };
0223
0224 &fspi {
0225 status = "okay";
0226
0227 mt35xu512aba0: flash@0 {
0228 #address-cells = <1>;
0229 #size-cells = <1>;
0230 compatible = "jedec,spi-nor";
0231 m25p,fast-read;
0232 spi-max-frequency = <50000000>;
0233 reg = <0>;
0234 spi-rx-bus-width = <8>;
0235 spi-tx-bus-width = <8>;
0236 };
0237 };
0238
0239 &i2c0 {
0240 status = "okay";
0241
0242 fpga@66 {
0243 compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
0244 "simple-mfd";
0245 reg = <0x66>;
0246
0247 mux: mux-controller {
0248 compatible = "reg-mux";
0249 #mux-control-cells = <1>;
0250 mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
0251 <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
0252 };
0253 };
0254
0255 i2c-mux@77 {
0256 compatible = "nxp,pca9547";
0257 reg = <0x77>;
0258 #address-cells = <1>;
0259 #size-cells = <0>;
0260
0261 i2c@2 {
0262 #address-cells = <1>;
0263 #size-cells = <0>;
0264 reg = <0x2>;
0265
0266 power-monitor@40 {
0267 compatible = "ti,ina220";
0268 reg = <0x40>;
0269 shunt-resistor = <500>;
0270 };
0271
0272 power-monitor@41 {
0273 compatible = "ti,ina220";
0274 reg = <0x41>;
0275 shunt-resistor = <1000>;
0276 };
0277 };
0278
0279 i2c@3 {
0280 #address-cells = <1>;
0281 #size-cells = <0>;
0282 reg = <0x3>;
0283
0284 temperature-sensor@4c {
0285 compatible = "nxp,sa56004";
0286 reg = <0x4c>;
0287 vcc-supply = <&sb_3v3>;
0288 };
0289
0290 temperature-sensor@4d {
0291 compatible = "nxp,sa56004";
0292 reg = <0x4d>;
0293 vcc-supply = <&sb_3v3>;
0294 };
0295
0296 rtc@51 {
0297 compatible = "nxp,pcf2129";
0298 reg = <0x51>;
0299 };
0300 };
0301 };
0302 };
0303
0304 &optee {
0305 status = "okay";
0306 };
0307
0308 &sata0 {
0309 status = "okay";
0310 };
0311
0312 &sata1 {
0313 status = "okay";
0314 };
0315
0316 &sata2 {
0317 status = "okay";
0318 };
0319
0320 &sata3 {
0321 status = "okay";
0322 };
0323
0324 &uart0 {
0325 status = "okay";
0326 };
0327
0328 &uart1 {
0329 status = "okay";
0330 };
0331
0332 &usb0 {
0333 status = "okay";
0334 };
0335
0336 &usb1 {
0337 status = "okay";
0338 };
