0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Samsung Exynos5433 TM2 board device tree source
0004 *
0005 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
0006 *
0007 * Common device tree source file for Samsung's TM2 and TM2E boards
0008 * which are based on Samsung Exynos5433 SoC.
0009 */
0010
0011 /dts-v1/;
0012 #include "exynos5433.dtsi"
0013 #include <dt-bindings/clock/samsung,s2mps11.h>
0014 #include <dt-bindings/gpio/gpio.h>
0015 #include <dt-bindings/input/input.h>
0016 #include <dt-bindings/interrupt-controller/irq.h>
0017 #include <dt-bindings/sound/samsung-i2s.h>
0018
0019 / {
0020 aliases {
0021 gsc0 = &gsc_0;
0022 gsc1 = &gsc_1;
0023 gsc2 = &gsc_2;
0024 pinctrl0 = &pinctrl_alive;
0025 pinctrl1 = &pinctrl_aud;
0026 pinctrl2 = &pinctrl_cpif;
0027 pinctrl3 = &pinctrl_ese;
0028 pinctrl4 = &pinctrl_finger;
0029 pinctrl5 = &pinctrl_fsys;
0030 pinctrl6 = &pinctrl_imem;
0031 pinctrl7 = &pinctrl_nfc;
0032 pinctrl8 = &pinctrl_peric;
0033 pinctrl9 = &pinctrl_touch;
0034 serial0 = &serial_0;
0035 serial1 = &serial_1;
0036 serial2 = &serial_2;
0037 serial3 = &serial_3;
0038 spi0 = &spi_0;
0039 spi1 = &spi_1;
0040 spi2 = &spi_2;
0041 spi3 = &spi_3;
0042 spi4 = &spi_4;
0043 mshc0 = &mshc_0;
0044 mshc2 = &mshc_2;
0045 };
0046
0047 chosen {
0048 stdout-path = &serial_1;
0049 };
0050
0051 memory@20000000 {
0052 device_type = "memory";
0053 reg = <0x0 0x20000000 0x0 0xc0000000>;
0054 };
0055
0056 gpio-keys {
0057 compatible = "gpio-keys";
0058
0059 power-key {
0060 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
0061 linux,code = <KEY_POWER>;
0062 label = "power key";
0063 debounce-interval = <10>;
0064 };
0065
0066 volume-up-key {
0067 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
0068 linux,code = <KEY_VOLUMEUP>;
0069 label = "volume-up key";
0070 debounce-interval = <10>;
0071 };
0072
0073 volume-down-key {
0074 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
0075 linux,code = <KEY_VOLUMEDOWN>;
0076 label = "volume-down key";
0077 debounce-interval = <10>;
0078 };
0079
0080 homepage-key {
0081 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
0082 linux,code = <KEY_MENU>;
0083 label = "homepage key";
0084 debounce-interval = <10>;
0085 };
0086 };
0087
0088 i2c_max98504: i2c-gpio-0 {
0089 compatible = "i2c-gpio";
0090 sda-gpios = <&gpd0 1 GPIO_ACTIVE_HIGH>;
0091 scl-gpios = <&gpd0 0 GPIO_ACTIVE_HIGH>;
0092 i2c-gpio,delay-us = <2>;
0093 #address-cells = <1>;
0094 #size-cells = <0>;
0095
0096 max98504: amplifier@31 {
0097 compatible = "maxim,max98504";
0098 reg = <0x31>;
0099 maxim,rx-path = <1>;
0100 maxim,tx-path = <1>;
0101 maxim,tx-channel-mask = <3>;
0102 maxim,tx-channel-source = <2>;
0103 };
0104 };
0105
0106 irda_regulator: irda-regulator {
0107 compatible = "regulator-fixed";
0108 enable-active-high;
0109 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
0110 regulator-name = "irda_regulator";
0111 };
0112
0113 sound {
0114 compatible = "samsung,tm2-audio";
0115 audio-codec = <&wm5110>, <&hdmi>;
0116 i2s-controller = <&i2s0 0>, <&i2s1 0>;
0117 audio-amplifier = <&max98504>;
0118 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
0119 model = "wm5110";
0120 samsung,audio-routing =
0121 /* Headphone */
0122 "HP", "HPOUT1L",
0123 "HP", "HPOUT1R",
0124
0125 /* Speaker */
0126 "SPK", "SPKOUT",
0127 "SPKOUT", "HPOUT2L",
0128 "SPKOUT", "HPOUT2R",
0129
0130 /* Receiver */
0131 "RCV", "HPOUT3L",
0132 "RCV", "HPOUT3R";
0133 status = "okay";
0134 };
0135 };
0136
0137 &adc {
0138 vdd-supply = <&ldo3_reg>;
0139 status = "okay";
0140
0141 thermistor-ap {
0142 compatible = "murata,ncp03wf104";
0143 pullup-uv = <1800000>;
0144 pullup-ohm = <100000>;
0145 pulldown-ohm = <0>;
0146 io-channels = <&adc 0>;
0147 };
0148
0149 thermistor-battery {
0150 compatible = "murata,ncp03wf104";
0151 pullup-uv = <1800000>;
0152 pullup-ohm = <100000>;
0153 pulldown-ohm = <0>;
0154 io-channels = <&adc 1>;
0155 #thermal-sensor-cells = <0>;
0156 };
0157
0158 thermistor-charger {
0159 compatible = "murata,ncp03wf104";
0160 pullup-uv = <1800000>;
0161 pullup-ohm = <100000>;
0162 pulldown-ohm = <0>;
0163 io-channels = <&adc 2>;
0164 };
0165 };
0166
0167 &bus_g2d_400 {
0168 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
0169 vdd-supply = <&buck4_reg>;
0170 exynos,saturation-ratio = <10>;
0171 status = "okay";
0172 };
0173
0174 &bus_g2d_266 {
0175 devfreq = <&bus_g2d_400>;
0176 status = "okay";
0177 };
0178
0179 &bus_gscl {
0180 devfreq = <&bus_g2d_400>;
0181 status = "okay";
0182 };
0183
0184 &bus_hevc {
0185 devfreq = <&bus_g2d_400>;
0186 status = "okay";
0187 };
0188
0189 &bus_jpeg {
0190 devfreq = <&bus_g2d_400>;
0191 status = "okay";
0192 };
0193
0194 &bus_mfc {
0195 devfreq = <&bus_g2d_400>;
0196 status = "okay";
0197 };
0198
0199 &bus_mscl {
0200 devfreq = <&bus_g2d_400>;
0201 status = "okay";
0202 };
0203
0204 &bus_noc0 {
0205 devfreq = <&bus_g2d_400>;
0206 status = "okay";
0207 };
0208
0209 &bus_noc1 {
0210 devfreq = <&bus_g2d_400>;
0211 status = "okay";
0212 };
0213
0214 &bus_noc2 {
0215 devfreq = <&bus_g2d_400>;
0216 status = "okay";
0217 };
0218
0219 &cmu_aud {
0220 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
0221 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
0222 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
0223 <&cmu_top CLK_MOUT_AUD_PLL>,
0224 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
0225 <&cmu_top CLK_MOUT_SCLK_AUDIO0>,
0226 <&cmu_top CLK_MOUT_SCLK_AUDIO1>,
0227 <&cmu_top CLK_MOUT_SCLK_SPDIF>,
0228
0229 <&cmu_aud CLK_DIV_AUD_CA5>,
0230 <&cmu_aud CLK_DIV_ACLK_AUD>,
0231 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
0232 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
0233 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
0234 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
0235 <&cmu_aud CLK_DIV_SCLK_AUD_UART>,
0236 <&cmu_top CLK_DIV_SCLK_AUDIO0>,
0237 <&cmu_top CLK_DIV_SCLK_AUDIO1>,
0238 <&cmu_top CLK_DIV_SCLK_PCM1>,
0239 <&cmu_top CLK_DIV_SCLK_I2S1>;
0240
0241 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
0242 <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
0243 <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
0244 <&cmu_top CLK_FOUT_AUD_PLL>,
0245 <&cmu_top CLK_MOUT_AUD_PLL>,
0246 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
0247 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
0248 <&cmu_top CLK_SCLK_AUDIO0>;
0249
0250 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
0251 <196608001>, <65536001>, <32768001>, <49152001>,
0252 <2048001>, <24576001>, <196608001>,
0253 <24576001>, <98304001>, <2048001>, <49152001>;
0254 };
0255
0256 &cmu_fsys {
0257 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
0258 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
0259 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
0260 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
0261 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
0262 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
0263 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
0264 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
0265 <&cmu_top CLK_DIV_SCLK_USBDRD30>,
0266 <&cmu_top CLK_DIV_SCLK_USBHOST30>;
0267 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
0268 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
0269 <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
0270 <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
0271 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
0272 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
0273 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
0274 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
0275 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
0276 <66700000>, <66700000>;
0277 };
0278
0279 &cmu_gscl {
0280 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
0281 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
0282 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
0283 <&cmu_top CLK_ACLK_GSCL_333>;
0284 };
0285
0286 &cmu_mfc {
0287 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
0288 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
0289 };
0290
0291 &cmu_mif {
0292 assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>;
0293 assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
0294 assigned-clock-rates = <0>, <333000000>;
0295 };
0296
0297 &cmu_mscl {
0298 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
0299 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
0300 <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
0301 <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
0302 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
0303 <&cmu_top CLK_SCLK_JPEG_MSCL>,
0304 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
0305 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
0306 };
0307
0308 &cmu_top {
0309 assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
0310 assigned-clock-rates = <196608001>;
0311 };
0312
0313 &cpu0 {
0314 cpu-supply = <&buck3_reg>;
0315 };
0316
0317 &cpu4 {
0318 cpu-supply = <&buck2_reg>;
0319 };
0320
0321 &decon {
0322 status = "okay";
0323 };
0324
0325 &decon_tv {
0326 status = "okay";
0327
0328 ports {
0329 #address-cells = <1>;
0330 #size-cells = <0>;
0331
0332 port@0 {
0333 reg = <0>;
0334 tv_to_hdmi: endpoint {
0335 remote-endpoint = <&hdmi_to_tv>;
0336 };
0337 };
0338 };
0339 };
0340
0341 &dsi {
0342 status = "okay";
0343 vddcore-supply = <&ldo6_reg>;
0344 vddio-supply = <&ldo7_reg>;
0345 samsung,burst-clock-frequency = <512000000>;
0346 samsung,esc-clock-frequency = <16000000>;
0347 samsung,pll-clock-frequency = <24000000>;
0348 pinctrl-names = "default";
0349 pinctrl-0 = <&te_irq>;
0350 };
0351
0352 &gpu {
0353 mali-supply = <&buck6_reg>;
0354 status = "okay";
0355 };
0356
0357 &hdmi {
0358 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
0359 status = "okay";
0360 vdd-supply = <&ldo6_reg>;
0361 vdd_osc-supply = <&ldo7_reg>;
0362 vdd_pll-supply = <&ldo6_reg>;
0363
0364 ports {
0365 #address-cells = <1>;
0366 #size-cells = <0>;
0367
0368 port@0 {
0369 reg = <0>;
0370 hdmi_to_tv: endpoint {
0371 remote-endpoint = <&tv_to_hdmi>;
0372 };
0373 };
0374
0375 port@1 {
0376 reg = <1>;
0377 hdmi_to_mhl: endpoint {
0378 remote-endpoint = <&mhl_to_hdmi>;
0379 };
0380 };
0381 };
0382 };
0383
0384 &hsi2c_0 {
0385 status = "okay";
0386 clock-frequency = <2500000>;
0387
0388 pmic@66 {
0389 compatible = "samsung,s2mps13-pmic";
0390 interrupt-parent = <&gpa0>;
0391 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
0392 reg = <0x66>;
0393 samsung,s2mps11-wrstbi-ground;
0394 wakeup-source;
0395
0396 s2mps13_osc: clocks {
0397 compatible = "samsung,s2mps13-clk";
0398 #clock-cells = <1>;
0399 clock-output-names = "s2mps13_ap", "s2mps13_cp",
0400 "s2mps13_bt";
0401 };
0402
0403 regulators {
0404 ldo1_reg: LDO1 {
0405 regulator-name = "VDD_ALIVE_0.9V_AP";
0406 regulator-min-microvolt = <900000>;
0407 regulator-max-microvolt = <900000>;
0408 regulator-always-on;
0409 };
0410
0411 ldo2_reg: LDO2 {
0412 regulator-name = "VDDQ_MMC2_2.8V_AP";
0413 regulator-min-microvolt = <2800000>;
0414 regulator-max-microvolt = <2800000>;
0415 regulator-always-on;
0416 regulator-state-mem {
0417 regulator-off-in-suspend;
0418 };
0419 };
0420
0421 ldo3_reg: LDO3 {
0422 regulator-name = "VDD1_E_1.8V_AP";
0423 regulator-min-microvolt = <1800000>;
0424 regulator-max-microvolt = <1800000>;
0425 regulator-always-on;
0426 };
0427
0428 ldo4_reg: LDO4 {
0429 regulator-name = "VDD10_MIF_PLL_1.0V_AP";
0430 regulator-min-microvolt = <1300000>;
0431 regulator-max-microvolt = <1300000>;
0432 regulator-always-on;
0433 regulator-state-mem {
0434 regulator-off-in-suspend;
0435 };
0436 };
0437
0438 ldo5_reg: LDO5 {
0439 regulator-name = "VDD10_DPLL_1.0V_AP";
0440 regulator-min-microvolt = <1000000>;
0441 regulator-max-microvolt = <1000000>;
0442 regulator-always-on;
0443 regulator-state-mem {
0444 regulator-off-in-suspend;
0445 };
0446 };
0447
0448 ldo6_reg: LDO6 {
0449 regulator-name = "VDD10_MIPI2L_1.0V_AP";
0450 regulator-min-microvolt = <1000000>;
0451 regulator-max-microvolt = <1000000>;
0452 regulator-state-mem {
0453 regulator-off-in-suspend;
0454 };
0455 };
0456
0457 ldo7_reg: LDO7 {
0458 regulator-name = "VDD18_MIPI2L_1.8V_AP";
0459 regulator-min-microvolt = <1800000>;
0460 regulator-max-microvolt = <1800000>;
0461 regulator-always-on;
0462 regulator-state-mem {
0463 regulator-off-in-suspend;
0464 };
0465 };
0466
0467 ldo8_reg: LDO8 {
0468 regulator-name = "VDD18_LLI_1.8V_AP";
0469 regulator-min-microvolt = <1800000>;
0470 regulator-max-microvolt = <1800000>;
0471 regulator-always-on;
0472 regulator-state-mem {
0473 regulator-off-in-suspend;
0474 };
0475 };
0476
0477 ldo9_reg: LDO9 {
0478 regulator-name = "VDD18_ABB_ETC_1.8V_AP";
0479 regulator-min-microvolt = <1800000>;
0480 regulator-max-microvolt = <1800000>;
0481 regulator-always-on;
0482 regulator-state-mem {
0483 regulator-off-in-suspend;
0484 };
0485 };
0486
0487 ldo10_reg: LDO10 {
0488 regulator-name = "VDD33_USB30_3.0V_AP";
0489 regulator-min-microvolt = <3000000>;
0490 regulator-max-microvolt = <3000000>;
0491 regulator-state-mem {
0492 regulator-off-in-suspend;
0493 };
0494 };
0495
0496 ldo11_reg: LDO11 {
0497 regulator-name = "VDD_INT_M_1.0V_AP";
0498 regulator-min-microvolt = <1000000>;
0499 regulator-max-microvolt = <1000000>;
0500 regulator-always-on;
0501 regulator-state-mem {
0502 regulator-off-in-suspend;
0503 };
0504 };
0505
0506 ldo12_reg: LDO12 {
0507 regulator-name = "VDD_KFC_M_1.1V_AP";
0508 regulator-min-microvolt = <800000>;
0509 regulator-max-microvolt = <1350000>;
0510 regulator-always-on;
0511 };
0512
0513 ldo13_reg: LDO13 {
0514 regulator-name = "VDD_G3D_M_0.95V_AP";
0515 regulator-min-microvolt = <950000>;
0516 regulator-max-microvolt = <950000>;
0517 regulator-always-on;
0518 regulator-state-mem {
0519 regulator-off-in-suspend;
0520 };
0521 };
0522
0523 ldo14_reg: LDO14 {
0524 regulator-name = "VDDQ_M1_LDO_1.2V_AP";
0525 regulator-min-microvolt = <1200000>;
0526 regulator-max-microvolt = <1200000>;
0527 regulator-always-on;
0528 regulator-state-mem {
0529 regulator-off-in-suspend;
0530 };
0531 };
0532
0533 ldo15_reg: LDO15 {
0534 regulator-name = "VDDQ_M2_LDO_1.2V_AP";
0535 regulator-min-microvolt = <1200000>;
0536 regulator-max-microvolt = <1200000>;
0537 regulator-always-on;
0538 regulator-state-mem {
0539 regulator-off-in-suspend;
0540 };
0541 };
0542
0543 ldo16_reg: LDO16 {
0544 regulator-name = "VDDQ_EFUSE";
0545 regulator-min-microvolt = <1400000>;
0546 regulator-max-microvolt = <3400000>;
0547 regulator-always-on;
0548 };
0549
0550 ldo17_reg: LDO17 {
0551 regulator-name = "V_TFLASH_2.8V_AP";
0552 regulator-min-microvolt = <2800000>;
0553 regulator-max-microvolt = <2800000>;
0554 };
0555
0556 ldo18_reg: LDO18 {
0557 regulator-name = "V_CODEC_1.8V_AP";
0558 regulator-min-microvolt = <1800000>;
0559 regulator-max-microvolt = <1800000>;
0560 };
0561
0562 ldo19_reg: LDO19 {
0563 regulator-name = "VDDA_1.8V_COMP";
0564 regulator-min-microvolt = <1800000>;
0565 regulator-max-microvolt = <1800000>;
0566 regulator-always-on;
0567 };
0568
0569 ldo20_reg: LDO20 {
0570 regulator-name = "VCC_2.8V_AP";
0571 regulator-min-microvolt = <2800000>;
0572 regulator-max-microvolt = <2800000>;
0573 regulator-always-on;
0574 };
0575
0576 ldo21_reg: LDO21 {
0577 regulator-name = "VT_CAM_1.8V";
0578 regulator-min-microvolt = <1800000>;
0579 regulator-max-microvolt = <1800000>;
0580 };
0581
0582 ldo22_reg: LDO22 {
0583 regulator-name = "CAM_IO_1.8V_AP";
0584 regulator-min-microvolt = <1800000>;
0585 regulator-max-microvolt = <1800000>;
0586 };
0587
0588 ldo23_reg: LDO23 {
0589 regulator-name = "CAM_SEN_CORE_1.05V_AP";
0590 regulator-min-microvolt = <1050000>;
0591 regulator-max-microvolt = <1050000>;
0592 };
0593
0594 ldo24_reg: LDO24 {
0595 regulator-name = "VT_CAM_1.2V";
0596 regulator-min-microvolt = <1200000>;
0597 regulator-max-microvolt = <1200000>;
0598 };
0599
0600 ldo25_reg: LDO25 {
0601 regulator-name = "UNUSED_LDO25";
0602 regulator-min-microvolt = <2800000>;
0603 regulator-max-microvolt = <2800000>;
0604 };
0605
0606 ldo26_reg: LDO26 {
0607 regulator-name = "CAM_AF_2.8V_AP";
0608 regulator-min-microvolt = <2800000>;
0609 regulator-max-microvolt = <2800000>;
0610 };
0611
0612 ldo27_reg: LDO27 {
0613 regulator-name = "VCC_3.0V_LCD_AP";
0614 regulator-min-microvolt = <3000000>;
0615 regulator-max-microvolt = <3000000>;
0616 };
0617
0618 ldo28_reg: LDO28 {
0619 regulator-name = "VCC_1.8V_LCD_AP";
0620 regulator-min-microvolt = <1800000>;
0621 regulator-max-microvolt = <1800000>;
0622 };
0623
0624 ldo29_reg: LDO29 {
0625 regulator-name = "VT_CAM_2.8V";
0626 regulator-min-microvolt = <3000000>;
0627 regulator-max-microvolt = <3000000>;
0628 };
0629
0630 ldo30_reg: LDO30 {
0631 regulator-name = "TSP_AVDD_3.3V_AP";
0632 regulator-min-microvolt = <3300000>;
0633 regulator-max-microvolt = <3300000>;
0634 };
0635
0636 ldo31_reg: LDO31 {
0637 /*
0638 * LDO31 differs from target to target,
0639 * its definition is in the .dts
0640 */
0641 };
0642
0643 ldo32_reg: LDO32 {
0644 regulator-name = "VTOUCH_1.8V_AP";
0645 regulator-min-microvolt = <1800000>;
0646 regulator-max-microvolt = <1800000>;
0647 };
0648
0649 ldo33_reg: LDO33 {
0650 regulator-name = "VTOUCH_LED_3.3V";
0651 regulator-min-microvolt = <2500000>;
0652 regulator-max-microvolt = <3300000>;
0653 regulator-ramp-delay = <12500>;
0654 };
0655
0656 ldo34_reg: LDO34 {
0657 regulator-name = "VCC_1.8V_MHL_AP";
0658 regulator-min-microvolt = <1000000>;
0659 regulator-max-microvolt = <2100000>;
0660 };
0661
0662 ldo35_reg: LDO35 {
0663 regulator-name = "OIS_VM_2.8V";
0664 regulator-min-microvolt = <1800000>;
0665 regulator-max-microvolt = <2800000>;
0666 };
0667
0668 ldo36_reg: LDO36 {
0669 regulator-name = "VSIL_1.0V";
0670 regulator-min-microvolt = <1000000>;
0671 regulator-max-microvolt = <1000000>;
0672 };
0673
0674 ldo37_reg: LDO37 {
0675 regulator-name = "VF_1.8V";
0676 regulator-min-microvolt = <1800000>;
0677 regulator-max-microvolt = <1800000>;
0678 };
0679
0680 ldo38_reg: LDO38 {
0681 /*
0682 * LDO38 differs from target to target,
0683 * its definition is in the .dts
0684 */
0685 };
0686
0687 ldo39_reg: LDO39 {
0688 regulator-name = "V_HRM_1.8V";
0689 regulator-min-microvolt = <1800000>;
0690 regulator-max-microvolt = <1800000>;
0691 };
0692
0693 ldo40_reg: LDO40 {
0694 regulator-name = "V_HRM_3.3V";
0695 regulator-min-microvolt = <3300000>;
0696 regulator-max-microvolt = <3300000>;
0697 };
0698
0699 buck1_reg: BUCK1 {
0700 regulator-name = "VDD_MIF_0.9V_AP";
0701 regulator-min-microvolt = <600000>;
0702 regulator-max-microvolt = <1500000>;
0703 regulator-always-on;
0704 regulator-state-mem {
0705 regulator-off-in-suspend;
0706 };
0707 };
0708
0709 buck2_reg: BUCK2 {
0710 regulator-name = "VDD_EGL_1.0V_AP";
0711 regulator-min-microvolt = <900000>;
0712 regulator-max-microvolt = <1300000>;
0713 regulator-always-on;
0714 regulator-state-mem {
0715 regulator-off-in-suspend;
0716 };
0717 };
0718
0719 buck3_reg: BUCK3 {
0720 regulator-name = "VDD_KFC_1.0V_AP";
0721 regulator-min-microvolt = <800000>;
0722 regulator-max-microvolt = <1200000>;
0723 regulator-always-on;
0724 regulator-state-mem {
0725 regulator-off-in-suspend;
0726 };
0727 };
0728
0729 buck4_reg: BUCK4 {
0730 regulator-name = "VDD_INT_0.95V_AP";
0731 regulator-min-microvolt = <600000>;
0732 regulator-max-microvolt = <1500000>;
0733 regulator-always-on;
0734 regulator-state-mem {
0735 regulator-off-in-suspend;
0736 };
0737 };
0738
0739 buck5_reg: BUCK5 {
0740 regulator-name = "VDD_DISP_CAM0_0.9V_AP";
0741 regulator-min-microvolt = <600000>;
0742 regulator-max-microvolt = <1500000>;
0743 regulator-always-on;
0744 regulator-state-mem {
0745 regulator-off-in-suspend;
0746 };
0747 };
0748
0749 buck6_reg: BUCK6 {
0750 regulator-name = "VDD_G3D_0.9V_AP";
0751 regulator-min-microvolt = <600000>;
0752 regulator-max-microvolt = <1500000>;
0753 regulator-always-on;
0754 regulator-state-mem {
0755 regulator-off-in-suspend;
0756 };
0757 };
0758
0759 buck7_reg: BUCK7 {
0760 regulator-name = "VDD_MEM1_1.2V_AP";
0761 regulator-min-microvolt = <1200000>;
0762 regulator-max-microvolt = <1200000>;
0763 regulator-always-on;
0764 };
0765
0766 buck8_reg: BUCK8 {
0767 regulator-name = "VDD_LLDO_1.35V_AP";
0768 regulator-min-microvolt = <1350000>;
0769 regulator-max-microvolt = <3300000>;
0770 regulator-always-on;
0771 };
0772
0773 buck9_reg: BUCK9 {
0774 regulator-name = "VDD_MLDO_2.0V_AP";
0775 regulator-min-microvolt = <1350000>;
0776 regulator-max-microvolt = <3300000>;
0777 regulator-always-on;
0778 };
0779
0780 buck10_reg: BUCK10 {
0781 regulator-name = "vdd_mem2";
0782 regulator-min-microvolt = <550000>;
0783 regulator-max-microvolt = <1500000>;
0784 regulator-always-on;
0785 };
0786 };
0787 };
0788 };
0789
0790 &hsi2c_4 {
0791 status = "okay";
0792
0793 s3fwrn5: nfc@27 {
0794 compatible = "samsung,s3fwrn5-i2c";
0795 reg = <0x27>;
0796 interrupt-parent = <&gpa1>;
0797 interrupts = <3 IRQ_TYPE_EDGE_RISING>;
0798 en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
0799 wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
0800 };
0801 };
0802
0803 &hsi2c_5 {
0804 status = "okay";
0805
0806 stmfts: touchscreen@49 {
0807 compatible = "st,stmfts";
0808 reg = <0x49>;
0809 interrupt-parent = <&gpa1>;
0810 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
0811 avdd-supply = <&ldo30_reg>;
0812 vdd-supply = <&ldo31_reg>;
0813 };
0814 };
0815
0816 &hsi2c_7 {
0817 status = "okay";
0818 clock-frequency = <1000000>;
0819
0820 bridge@39 {
0821 reg = <0x39>;
0822 compatible = "sil,sii8620";
0823 cvcc10-supply = <&ldo36_reg>;
0824 iovcc18-supply = <&ldo34_reg>;
0825 interrupt-parent = <&gpf0>;
0826 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
0827 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
0828 clocks = <&pmu_system_controller 0>;
0829 clock-names = "xtal";
0830
0831 ports {
0832 #address-cells = <1>;
0833 #size-cells = <0>;
0834
0835 port@0 {
0836 reg = <0>;
0837 mhl_to_hdmi: endpoint {
0838 remote-endpoint = <&hdmi_to_mhl>;
0839 };
0840 };
0841
0842 port@1 {
0843 reg = <1>;
0844 mhl_to_musb_con: endpoint {
0845 remote-endpoint = <&musb_con_to_mhl>;
0846 };
0847 };
0848 };
0849 };
0850 };
0851
0852 &hsi2c_8 {
0853 status = "okay";
0854
0855 pmic@66 {
0856 compatible = "maxim,max77843";
0857 interrupt-parent = <&gpa1>;
0858 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
0859 reg = <0x66>;
0860
0861 muic: extcon {
0862 compatible = "maxim,max77843-muic";
0863
0864 musb_con: connector {
0865 compatible = "samsung,usb-connector-11pin",
0866 "usb-b-connector";
0867 label = "micro-USB";
0868 type = "micro";
0869
0870 ports {
0871 #address-cells = <1>;
0872 #size-cells = <0>;
0873
0874 port@0 {
0875 /*
0876 * TODO: The DTS this is based on does not have
0877 * port@0 which is a required property. The ports
0878 * look incomplete and need fixing.
0879 * Add a disabled port just to satisfy dtschema.
0880 */
0881 reg = <0>;
0882 status = "disabled";
0883 };
0884
0885 port@3 {
0886 reg = <3>;
0887 musb_con_to_mhl: endpoint {
0888 remote-endpoint = <&mhl_to_musb_con>;
0889 };
0890 };
0891 };
0892 };
0893
0894 ports {
0895 port {
0896 muic_to_usb: endpoint {
0897 remote-endpoint = <&usb_to_muic>;
0898 };
0899 };
0900 };
0901 };
0902
0903 regulators {
0904 compatible = "maxim,max77843-regulator";
0905 safeout1_reg: SAFEOUT1 {
0906 regulator-name = "SAFEOUT1";
0907 regulator-min-microvolt = <3300000>;
0908 regulator-max-microvolt = <4950000>;
0909 };
0910
0911 safeout2_reg: SAFEOUT2 {
0912 regulator-name = "SAFEOUT2";
0913 regulator-min-microvolt = <3300000>;
0914 regulator-max-microvolt = <4950000>;
0915 };
0916
0917 charger_reg: CHARGER {
0918 regulator-name = "CHARGER";
0919 regulator-min-microamp = <100000>;
0920 regulator-max-microamp = <3150000>;
0921 };
0922 };
0923
0924 haptic: motor-driver {
0925 compatible = "maxim,max77843-haptic";
0926 haptic-supply = <&ldo38_reg>;
0927 pwms = <&pwm 0 33670 0>;
0928 pwm-names = "haptic";
0929 };
0930 };
0931 };
0932
0933 &hsi2c_11 {
0934 status = "okay";
0935 };
0936
0937 &i2s0 {
0938 status = "okay";
0939 };
0940
0941 &i2s1 {
0942 assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
0943 assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
0944 status = "okay";
0945 };
0946
0947 &mshc_0 {
0948 status = "okay";
0949 mmc-hs200-1_8v;
0950 mmc-hs400-1_8v;
0951 cap-mmc-highspeed;
0952 non-removable;
0953 card-detect-delay = <200>;
0954 samsung,dw-mshc-ciu-div = <3>;
0955 samsung,dw-mshc-sdr-timing = <0 4>;
0956 samsung,dw-mshc-ddr-timing = <0 2>;
0957 samsung,dw-mshc-hs400-timing = <0 3>;
0958 samsung,read-strobe-delay = <90>;
0959 fifo-depth = <0x80>;
0960 pinctrl-names = "default";
0961 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
0962 &sd0_bus8 &sd0_rdqs>;
0963 bus-width = <8>;
0964 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
0965 assigned-clock-rates = <800000000>;
0966 };
0967
0968 &mshc_2 {
0969 status = "okay";
0970 cap-sd-highspeed;
0971 disable-wp;
0972 cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
0973 card-detect-delay = <200>;
0974 samsung,dw-mshc-ciu-div = <3>;
0975 samsung,dw-mshc-sdr-timing = <0 4>;
0976 samsung,dw-mshc-ddr-timing = <0 2>;
0977 fifo-depth = <0x80>;
0978 pinctrl-names = "default";
0979 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
0980 bus-width = <4>;
0981 };
0982
0983 &pcie {
0984 status = "okay";
0985 pinctrl-names = "default";
0986 pinctrl-0 = <&pcie_bus &pcie_wlanen>;
0987 vdd10-supply = <&ldo6_reg>;
0988 vdd18-supply = <&ldo7_reg>;
0989 assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
0990 <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
0991 assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
0992 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
0993 assigned-clock-rates = <0>, <100000000>;
0994 interrupt-map-mask = <0 0 0 0>;
0995 interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
0996 };
0997
0998 &pcie_phy {
0999 status = "okay";
1000 };
1001
1002 &ppmu_d0_general {
1003 status = "okay";
1004 events {
1005 ppmu_event0_d0_general: ppmu-event0-d0-general {
1006 event-name = "ppmu-event0-d0-general";
1007 };
1008 };
1009 };
1010
1011 &ppmu_d1_general {
1012 status = "okay";
1013 events {
1014 ppmu_event0_d1_general: ppmu-event0-d1-general {
1015 event-name = "ppmu-event0-d1-general";
1016 };
1017 };
1018 };
1019
1020 &pinctrl_alive {
1021 pinctrl-names = "default";
1022 pinctrl-0 = <&initial_alive>;
1023
1024 initial_alive: initial-state {
1025 PIN_IN(gpa0-0, DOWN, FAST_SR1);
1026 PIN_IN(gpa0-1, NONE, FAST_SR1);
1027 PIN_IN(gpa0-2, DOWN, FAST_SR1);
1028 PIN_IN(gpa0-3, NONE, FAST_SR1);
1029 PIN_IN(gpa0-4, NONE, FAST_SR1);
1030 PIN_IN(gpa0-5, DOWN, FAST_SR1);
1031 PIN_IN(gpa0-6, NONE, FAST_SR1);
1032 PIN_IN(gpa0-7, NONE, FAST_SR1);
1033
1034 PIN_IN(gpa1-0, UP, FAST_SR1);
1035 PIN_IN(gpa1-1, UP, FAST_SR1);
1036 PIN_IN(gpa1-2, NONE, FAST_SR1);
1037 PIN_IN(gpa1-3, DOWN, FAST_SR1);
1038 PIN_IN(gpa1-4, DOWN, FAST_SR1);
1039 PIN_IN(gpa1-5, NONE, FAST_SR1);
1040 PIN_IN(gpa1-6, NONE, FAST_SR1);
1041 PIN_IN(gpa1-7, NONE, FAST_SR1);
1042
1043 PIN_IN(gpa2-0, NONE, FAST_SR1);
1044 PIN_IN(gpa2-1, NONE, FAST_SR1);
1045 PIN_IN(gpa2-2, NONE, FAST_SR1);
1046 PIN_IN(gpa2-3, DOWN, FAST_SR1);
1047 PIN_IN(gpa2-4, NONE, FAST_SR1);
1048 PIN_IN(gpa2-5, DOWN, FAST_SR1);
1049 PIN_IN(gpa2-6, DOWN, FAST_SR1);
1050 PIN_IN(gpa2-7, NONE, FAST_SR1);
1051
1052 PIN_IN(gpa3-0, DOWN, FAST_SR1);
1053 PIN_IN(gpa3-1, DOWN, FAST_SR1);
1054 PIN_IN(gpa3-2, NONE, FAST_SR1);
1055 PIN_IN(gpa3-3, DOWN, FAST_SR1);
1056 PIN_IN(gpa3-4, NONE, FAST_SR1);
1057 PIN_IN(gpa3-5, DOWN, FAST_SR1);
1058 PIN_IN(gpa3-6, DOWN, FAST_SR1);
1059 PIN_IN(gpa3-7, DOWN, FAST_SR1);
1060
1061 PIN_IN(gpf1-0, NONE, FAST_SR1);
1062 PIN_IN(gpf1-1, NONE, FAST_SR1);
1063 PIN_IN(gpf1-2, DOWN, FAST_SR1);
1064 PIN_IN(gpf1-4, UP, FAST_SR1);
1065 PIN_OT(gpf1-5, NONE, FAST_SR1);
1066 PIN_IN(gpf1-6, DOWN, FAST_SR1);
1067 PIN_IN(gpf1-7, DOWN, FAST_SR1);
1068
1069 PIN_IN(gpf2-0, DOWN, FAST_SR1);
1070 PIN_IN(gpf2-1, DOWN, FAST_SR1);
1071 PIN_IN(gpf2-2, DOWN, FAST_SR1);
1072 PIN_IN(gpf2-3, DOWN, FAST_SR1);
1073
1074 PIN_IN(gpf3-0, DOWN, FAST_SR1);
1075 PIN_IN(gpf3-1, DOWN, FAST_SR1);
1076 PIN_IN(gpf3-2, NONE, FAST_SR1);
1077 PIN_IN(gpf3-3, DOWN, FAST_SR1);
1078
1079 PIN_IN(gpf4-0, DOWN, FAST_SR1);
1080 PIN_IN(gpf4-1, DOWN, FAST_SR1);
1081 PIN_IN(gpf4-2, DOWN, FAST_SR1);
1082 PIN_IN(gpf4-3, DOWN, FAST_SR1);
1083 PIN_IN(gpf4-4, DOWN, FAST_SR1);
1084 PIN_IN(gpf4-5, DOWN, FAST_SR1);
1085 PIN_IN(gpf4-6, DOWN, FAST_SR1);
1086 PIN_IN(gpf4-7, DOWN, FAST_SR1);
1087
1088 PIN_IN(gpf5-0, DOWN, FAST_SR1);
1089 PIN_IN(gpf5-1, DOWN, FAST_SR1);
1090 PIN_IN(gpf5-2, DOWN, FAST_SR1);
1091 PIN_IN(gpf5-3, DOWN, FAST_SR1);
1092 PIN_OT(gpf5-4, NONE, FAST_SR1);
1093 PIN_IN(gpf5-5, DOWN, FAST_SR1);
1094 PIN_IN(gpf5-6, DOWN, FAST_SR1);
1095 PIN_IN(gpf5-7, DOWN, FAST_SR1);
1096 };
1097
1098 te_irq: te-irq-pins {
1099 samsung,pins = "gpf1-3";
1100 samsung,pin-function = <0xf>;
1101 };
1102 };
1103
1104 &pinctrl_cpif {
1105 pinctrl-names = "default";
1106 pinctrl-0 = <&initial_cpif>;
1107
1108 initial_cpif: initial-state {
1109 PIN_IN(gpv6-0, DOWN, FAST_SR1);
1110 PIN_IN(gpv6-1, DOWN, FAST_SR1);
1111 };
1112 };
1113
1114 &pinctrl_ese {
1115 pinctrl-names = "default";
1116 pinctrl-0 = <&initial_ese>;
1117
1118 pcie_wlanen: pcie-wlanen-pins {
1119 samsung,pins = "gpj2-0";
1120 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
1121 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
1122 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
1123 };
1124
1125 initial_ese: initial-state {
1126 PIN_IN(gpj2-1, DOWN, FAST_SR1);
1127 PIN_IN(gpj2-2, DOWN, FAST_SR1);
1128 };
1129 };
1130
1131 &pinctrl_fsys {
1132 pinctrl-names = "default";
1133 pinctrl-0 = <&initial_fsys>;
1134
1135 initial_fsys: initial-state {
1136 PIN_IN(gpr3-0, NONE, FAST_SR1);
1137 PIN_IN(gpr3-1, DOWN, FAST_SR1);
1138 PIN_IN(gpr3-2, DOWN, FAST_SR1);
1139 PIN_IN(gpr3-3, DOWN, FAST_SR1);
1140 PIN_IN(gpr3-7, NONE, FAST_SR1);
1141 };
1142 };
1143
1144 &pinctrl_imem {
1145 pinctrl-names = "default";
1146 pinctrl-0 = <&initial_imem>;
1147
1148 initial_imem: initial-state {
1149 PIN_IN(gpf0-0, UP, FAST_SR1);
1150 PIN_IN(gpf0-1, UP, FAST_SR1);
1151 PIN_IN(gpf0-2, DOWN, FAST_SR1);
1152 PIN_IN(gpf0-3, UP, FAST_SR1);
1153 PIN_IN(gpf0-4, DOWN, FAST_SR1);
1154 PIN_IN(gpf0-5, NONE, FAST_SR1);
1155 PIN_IN(gpf0-6, DOWN, FAST_SR1);
1156 PIN_IN(gpf0-7, UP, FAST_SR1);
1157 };
1158 };
1159
1160 &pinctrl_nfc {
1161 pinctrl-names = "default";
1162 pinctrl-0 = <&initial_nfc>;
1163
1164 initial_nfc: initial-state {
1165 PIN_IN(gpj0-2, DOWN, FAST_SR1);
1166 };
1167 };
1168
1169 &pinctrl_peric {
1170 pinctrl-names = "default";
1171 pinctrl-0 = <&initial_peric>;
1172
1173 initial_peric: initial-state {
1174 PIN_IN(gpv7-0, DOWN, FAST_SR1);
1175 PIN_IN(gpv7-1, DOWN, FAST_SR1);
1176 PIN_IN(gpv7-2, NONE, FAST_SR1);
1177 PIN_IN(gpv7-3, DOWN, FAST_SR1);
1178 PIN_IN(gpv7-4, DOWN, FAST_SR1);
1179 PIN_IN(gpv7-5, DOWN, FAST_SR1);
1180
1181 PIN_IN(gpb0-4, DOWN, FAST_SR1);
1182
1183 PIN_IN(gpc0-2, DOWN, FAST_SR1);
1184 PIN_IN(gpc0-5, DOWN, FAST_SR1);
1185 PIN_IN(gpc0-7, DOWN, FAST_SR1);
1186
1187 PIN_IN(gpc1-1, DOWN, FAST_SR1);
1188
1189 PIN_IN(gpc3-4, NONE, FAST_SR1);
1190 PIN_IN(gpc3-5, NONE, FAST_SR1);
1191 PIN_IN(gpc3-6, NONE, FAST_SR1);
1192 PIN_IN(gpc3-7, NONE, FAST_SR1);
1193
1194 PIN_OT(gpg0-0, NONE, FAST_SR1);
1195 PIN_F2(gpg0-1, DOWN, FAST_SR1);
1196
1197 PIN_IN(gpd2-5, DOWN, FAST_SR1);
1198
1199 PIN_IN(gpd4-0, NONE, FAST_SR1);
1200 PIN_IN(gpd4-1, DOWN, FAST_SR1);
1201 PIN_IN(gpd4-2, DOWN, FAST_SR1);
1202 PIN_IN(gpd4-3, DOWN, FAST_SR1);
1203 PIN_IN(gpd4-4, DOWN, FAST_SR1);
1204
1205 PIN_IN(gpd6-3, DOWN, FAST_SR1);
1206
1207 PIN_IN(gpd8-1, UP, FAST_SR1);
1208
1209 PIN_IN(gpg1-0, DOWN, FAST_SR1);
1210 PIN_IN(gpg1-1, DOWN, FAST_SR1);
1211 PIN_IN(gpg1-2, DOWN, FAST_SR1);
1212 PIN_IN(gpg1-3, DOWN, FAST_SR1);
1213 PIN_IN(gpg1-4, DOWN, FAST_SR1);
1214
1215 PIN_IN(gpg2-0, DOWN, FAST_SR1);
1216 PIN_IN(gpg2-1, DOWN, FAST_SR1);
1217
1218 PIN_IN(gpg3-0, DOWN, FAST_SR1);
1219 PIN_IN(gpg3-1, DOWN, FAST_SR1);
1220 PIN_IN(gpg3-5, DOWN, FAST_SR1);
1221 };
1222 };
1223
1224 &pinctrl_touch {
1225 pinctrl-names = "default";
1226 pinctrl-0 = <&initial_touch>;
1227
1228 initial_touch: initial-state {
1229 PIN_IN(gpj1-2, DOWN, FAST_SR1);
1230 };
1231 };
1232
1233 &pwm {
1234 pinctrl-0 = <&pwm0_out>;
1235 pinctrl-names = "default";
1236 status = "okay";
1237 };
1238
1239 &mic {
1240 status = "okay";
1241 };
1242
1243 &pmu_system_controller {
1244 assigned-clocks = <&pmu_system_controller 0>;
1245 assigned-clock-parents = <&xxti>;
1246 };
1247
1248 &serial_1 {
1249 status = "okay";
1250 };
1251
1252 &serial_3 {
1253 status = "okay";
1254
1255 bluetooth {
1256 compatible = "brcm,bcm43438-bt";
1257 max-speed = <3000000>;
1258 shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
1259 device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
1260 host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
1261 clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
1262 clock-names = "extclk";
1263 };
1264 };
1265
1266 &spi_1 {
1267 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1268 status = "okay";
1269
1270 wm5110: audio-codec@0 {
1271 compatible = "wlf,wm5110";
1272 reg = <0x0>;
1273 spi-max-frequency = <20000000>;
1274 interrupt-parent = <&gpa0>;
1275 interrupts = <4 IRQ_TYPE_NONE>;
1276 clocks = <&pmu_system_controller 0>,
1277 <&s2mps13_osc S2MPS11_CLK_BT>;
1278 clock-names = "mclk1", "mclk2";
1279
1280 gpio-controller;
1281 #gpio-cells = <2>;
1282
1283 wlf,micd-detect-debounce = <300>;
1284 wlf,micd-bias-start-time = <0x1>;
1285 wlf,micd-rate = <0x7>;
1286 wlf,micd-dbtime = <0x1>;
1287 wlf,micd-force-micbias;
1288 wlf,micd-configs = <0x0 1 0>;
1289 wlf,hpdet-channel = <1>;
1290 wlf,gpsw = <0x1>;
1291 wlf,inmode = <2 0 2 0>;
1292
1293 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1294 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1295
1296 /* core supplies */
1297 AVDD-supply = <&ldo18_reg>;
1298 DBVDD1-supply = <&ldo18_reg>;
1299 CPVDD-supply = <&ldo18_reg>;
1300 DBVDD2-supply = <&ldo18_reg>;
1301 DBVDD3-supply = <&ldo18_reg>;
1302
1303 controller-data {
1304 samsung,spi-feedback-delay = <0>;
1305 };
1306 };
1307 };
1308
1309 &spi_3 {
1310 status = "okay";
1311 no-cs-readback;
1312
1313 irled@0 {
1314 compatible = "ir-spi-led";
1315 reg = <0x0>;
1316 spi-max-frequency = <5000000>;
1317 power-supply = <&irda_regulator>;
1318 duty-cycle = <60>;
1319 led-active-low;
1320
1321 controller-data {
1322 samsung,spi-feedback-delay = <0>;
1323 };
1324 };
1325 };
1326
1327 &timer {
1328 clock-frequency = <24000000>;
1329 };
1330
1331 &tmu_atlas0 {
1332 vtmu-supply = <&ldo3_reg>;
1333 status = "okay";
1334 };
1335
1336 &tmu_apollo {
1337 vtmu-supply = <&ldo3_reg>;
1338 status = "okay";
1339 };
1340
1341 &tmu_g3d {
1342 vtmu-supply = <&ldo3_reg>;
1343 status = "okay";
1344 };
1345
1346 &usbdrd30 {
1347 vdd33-supply = <&ldo10_reg>;
1348 vdd10-supply = <&ldo6_reg>;
1349 status = "okay";
1350 };
1351
1352 &usbdrd_dwc3 {
1353 dr_mode = "otg";
1354 };
1355
1356 &usbdrd30_phy {
1357 vbus-supply = <&safeout1_reg>;
1358 status = "okay";
1359
1360 port {
1361 usb_to_muic: endpoint {
1362 remote-endpoint = <&muic_to_usb>;
1363 };
1364 };
1365 };
1366
1367 &xxti {
1368 clock-frequency = <24000000>;
1369 };
