0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
0004 *
0005 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
0006 * Chanwoo Choi <cw00.choi@samsung.com>
0007 */
0008
0009 &soc {
0010 bus_g2d_400: bus0 {
0011 compatible = "samsung,exynos-bus";
0012 clocks = <&cmu_top CLK_ACLK_G2D_400>;
0013 clock-names = "bus";
0014 operating-points-v2 = <&bus_g2d_400_opp_table>;
0015 status = "disabled";
0016 };
0017
0018 bus_g2d_266: bus1 {
0019 compatible = "samsung,exynos-bus";
0020 clocks = <&cmu_top CLK_ACLK_G2D_266>;
0021 clock-names = "bus";
0022 operating-points-v2 = <&bus_g2d_266_opp_table>;
0023 status = "disabled";
0024 };
0025
0026 bus_gscl: bus2 {
0027 compatible = "samsung,exynos-bus";
0028 clocks = <&cmu_top CLK_ACLK_GSCL_333>;
0029 clock-names = "bus";
0030 operating-points-v2 = <&bus_gscl_opp_table>;
0031 status = "disabled";
0032 };
0033
0034 bus_hevc: bus3 {
0035 compatible = "samsung,exynos-bus";
0036 clocks = <&cmu_top CLK_ACLK_HEVC_400>;
0037 clock-names = "bus";
0038 operating-points-v2 = <&bus_hevc_opp_table>;
0039 status = "disabled";
0040 };
0041
0042 bus_jpeg: bus4 {
0043 compatible = "samsung,exynos-bus";
0044 clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
0045 clock-names = "bus";
0046 operating-points-v2 = <&bus_g2d_400_opp_table>;
0047 status = "disabled";
0048 };
0049
0050 bus_mfc: bus5 {
0051 compatible = "samsung,exynos-bus";
0052 clocks = <&cmu_top CLK_ACLK_MFC_400>;
0053 clock-names = "bus";
0054 operating-points-v2 = <&bus_g2d_400_opp_table>;
0055 status = "disabled";
0056 };
0057
0058 bus_mscl: bus6 {
0059 compatible = "samsung,exynos-bus";
0060 clocks = <&cmu_top CLK_ACLK_MSCL_400>;
0061 clock-names = "bus";
0062 operating-points-v2 = <&bus_g2d_400_opp_table>;
0063 status = "disabled";
0064 };
0065
0066 bus_noc0: bus7 {
0067 compatible = "samsung,exynos-bus";
0068 clocks = <&cmu_top CLK_ACLK_BUS0_400>;
0069 clock-names = "bus";
0070 operating-points-v2 = <&bus_hevc_opp_table>;
0071 status = "disabled";
0072 };
0073
0074 bus_noc1: bus8 {
0075 compatible = "samsung,exynos-bus";
0076 clocks = <&cmu_top CLK_ACLK_BUS1_400>;
0077 clock-names = "bus";
0078 operating-points-v2 = <&bus_hevc_opp_table>;
0079 status = "disabled";
0080 };
0081
0082 bus_noc2: bus9 {
0083 compatible = "samsung,exynos-bus";
0084 clocks = <&cmu_mif CLK_ACLK_BUS2_400>;
0085 clock-names = "bus";
0086 operating-points-v2 = <&bus_noc2_opp_table>;
0087 status = "disabled";
0088 };
0089
0090 bus_g2d_400_opp_table: opp-table-2 {
0091 compatible = "operating-points-v2";
0092 opp-shared;
0093
0094 opp-400000000 {
0095 opp-hz = /bits/ 64 <400000000>;
0096 opp-microvolt = <1075000>;
0097 };
0098 opp-267000000 {
0099 opp-hz = /bits/ 64 <267000000>;
0100 opp-microvolt = <1000000>;
0101 };
0102 opp-200000000 {
0103 opp-hz = /bits/ 64 <200000000>;
0104 opp-microvolt = <975000>;
0105 };
0106 opp-160000000 {
0107 opp-hz = /bits/ 64 <160000000>;
0108 opp-microvolt = <962500>;
0109 };
0110 opp-134000000 {
0111 opp-hz = /bits/ 64 <134000000>;
0112 opp-microvolt = <950000>;
0113 };
0114 opp-100000000 {
0115 opp-hz = /bits/ 64 <100000000>;
0116 opp-microvolt = <937500>;
0117 };
0118 };
0119
0120 bus_g2d_266_opp_table: opp-table-3 {
0121 compatible = "operating-points-v2";
0122
0123 opp-267000000 {
0124 opp-hz = /bits/ 64 <267000000>;
0125 };
0126 opp-200000000 {
0127 opp-hz = /bits/ 64 <200000000>;
0128 };
0129 opp-160000000 {
0130 opp-hz = /bits/ 64 <160000000>;
0131 };
0132 opp-134000000 {
0133 opp-hz = /bits/ 64 <134000000>;
0134 };
0135 opp-100000000 {
0136 opp-hz = /bits/ 64 <100000000>;
0137 };
0138 };
0139
0140 bus_gscl_opp_table: opp-table-4 {
0141 compatible = "operating-points-v2";
0142
0143 opp-333000000 {
0144 opp-hz = /bits/ 64 <333000000>;
0145 };
0146 opp-222000000 {
0147 opp-hz = /bits/ 64 <222000000>;
0148 };
0149 opp-166500000 {
0150 opp-hz = /bits/ 64 <166500000>;
0151 };
0152 };
0153
0154 bus_hevc_opp_table: opp-table-5 {
0155 compatible = "operating-points-v2";
0156 opp-shared;
0157
0158 opp-400000000 {
0159 opp-hz = /bits/ 64 <400000000>;
0160 };
0161 opp-267000000 {
0162 opp-hz = /bits/ 64 <267000000>;
0163 };
0164 opp-200000000 {
0165 opp-hz = /bits/ 64 <200000000>;
0166 };
0167 opp-160000000 {
0168 opp-hz = /bits/ 64 <160000000>;
0169 };
0170 opp-134000000 {
0171 opp-hz = /bits/ 64 <134000000>;
0172 };
0173 opp-100000000 {
0174 opp-hz = /bits/ 64 <100000000>;
0175 };
0176 };
0177
0178 bus_noc2_opp_table: opp-table-6 {
0179 compatible = "operating-points-v2";
0180
0181 opp-400000000 {
0182 opp-hz = /bits/ 64 <400000000>;
0183 };
0184 opp-200000000 {
0185 opp-hz = /bits/ 64 <200000000>;
0186 };
0187 opp-134000000 {
0188 opp-hz = /bits/ 64 <134000000>;
0189 };
0190 opp-100000000 {
0191 opp-hz = /bits/ 64 <100000000>;
0192 };
0193 };
0194 };
