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OSCL-LXR

 
 

    


0001 /*
0002  *  BSD LICENSE
0003  *
0004  *  Copyright (c) 2016 Broadcom.  All rights reserved.
0005  *
0006  *  Redistribution and use in source and binary forms, with or without
0007  *  modification, are permitted provided that the following conditions
0008  *  are met:
0009  *
0010  *    * Redistributions of source code must retain the above copyright
0011  *      notice, this list of conditions and the following disclaimer.
0012  *    * Redistributions in binary form must reproduce the above copyright
0013  *      notice, this list of conditions and the following disclaimer in
0014  *      the documentation and/or other materials provided with the
0015  *      distribution.
0016  *    * Neither the name of Broadcom Corporation nor the names of its
0017  *      contributors may be used to endorse or promote products derived
0018  *      from this software without specific prior written permission.
0019  *
0020  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0021  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0022  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
0023  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0024  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
0025  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
0026  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
0027  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
0028  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0029  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
0030  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0031  */
0032 
0033 #include <dt-bindings/clock/bcm-ns2.h>
0034 
0035         osc: oscillator {
0036                 #clock-cells = <0>;
0037                 compatible = "fixed-clock";
0038                 clock-frequency = <25000000>;
0039         };
0040 
0041         lcpll_ddr: lcpll_ddr@6501d058 {
0042                 #clock-cells = <1>;
0043                 compatible = "brcm,ns2-lcpll-ddr";
0044                 reg = <0x6501d058 0x20>,
0045                       <0x6501c020 0x4>,
0046                       <0x6501d04c 0x4>;
0047                 clocks = <&osc>;
0048                 clock-output-names = "lcpll_ddr", "pcie_sata_usb",
0049                                      "ddr", "ddr_ch2_unused",
0050                                      "ddr_ch3_unused", "ddr_ch4_unused",
0051                                      "ddr_ch5_unused";
0052         };
0053 
0054         lcpll_ports: lcpll_ports@6501d078 {
0055                 #clock-cells = <1>;
0056                 compatible = "brcm,ns2-lcpll-ports";
0057                 reg = <0x6501d078 0x20>,
0058                       <0x6501c020 0x4>,
0059                       <0x6501d054 0x4>;
0060                 clocks = <&osc>;
0061                 clock-output-names = "lcpll_ports", "wan", "rgmii",
0062                                      "ports_ch2_unused",
0063                                      "ports_ch3_unused",
0064                                      "ports_ch4_unused",
0065                                      "ports_ch5_unused";
0066         };
0067 
0068         genpll_scr: genpll_scr@6501d098 {
0069                 #clock-cells = <1>;
0070                 compatible = "brcm,ns2-genpll-scr";
0071                 reg = <0x6501d098 0x32>,
0072                       <0x6501c020 0x4>,
0073                       <0x6501d044 0x4>;
0074                 clocks = <&osc>;
0075                 clock-output-names = "genpll_scr", "scr", "fs",
0076                                      "audio_ref", "scr_ch3_unused",
0077                                      "scr_ch4_unused", "scr_ch5_unused";
0078         };
0079 
0080         iprocmed: iprocmed {
0081                 #clock-cells = <0>;
0082                 compatible = "fixed-factor-clock";
0083                 clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
0084                 clock-div = <2>;
0085                 clock-mult = <1>;
0086         };
0087 
0088         iprocslow: iprocslow {
0089                 #clock-cells = <0>;
0090                 compatible = "fixed-factor-clock";
0091                 clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
0092                 clock-div = <4>;
0093                 clock-mult = <1>;
0094         };
0095 
0096         genpll_sw: genpll_sw@6501d0c4 {
0097                 #clock-cells = <1>;
0098                 compatible = "brcm,ns2-genpll-sw";
0099                 reg = <0x6501d0c4 0x32>,
0100                       <0x6501c020 0x4>,
0101                       <0x6501d044 0x4>;
0102                 clocks = <&osc>;
0103                 clock-output-names = "genpll_sw", "rpe", "250", "nic",
0104                                      "chimp", "port", "sdio";
0105         };