0001 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
0002
0003 #include <dt-bindings/interrupt-controller/irq.h>
0004 #include <dt-bindings/interrupt-controller/arm-gic.h>
0005 #include <dt-bindings/phy/phy.h>
0006 #include <dt-bindings/soc/bcm-pmb.h>
0007
0008 /dts-v1/;
0009
0010 / {
0011 interrupt-parent = <&gic>;
0012
0013 #address-cells = <2>;
0014 #size-cells = <2>;
0015
0016 aliases {
0017 serial0 = &uart0;
0018 };
0019
0020 chosen {
0021 stdout-path = "serial0:115200n8";
0022 };
0023
0024 cpus {
0025 #address-cells = <1>;
0026 #size-cells = <0>;
0027
0028 cpu0: cpu@0 {
0029 device_type = "cpu";
0030 compatible = "brcm,brahma-b53";
0031 reg = <0x0>;
0032 enable-method = "spin-table";
0033 cpu-release-addr = <0x0 0xfff8>;
0034 next-level-cache = <&l2>;
0035 };
0036
0037 cpu1: cpu@1 {
0038 device_type = "cpu";
0039 compatible = "brcm,brahma-b53";
0040 reg = <0x1>;
0041 enable-method = "spin-table";
0042 cpu-release-addr = <0x0 0xfff8>;
0043 next-level-cache = <&l2>;
0044 };
0045
0046 cpu2: cpu@2 {
0047 device_type = "cpu";
0048 compatible = "brcm,brahma-b53";
0049 reg = <0x2>;
0050 enable-method = "spin-table";
0051 cpu-release-addr = <0x0 0xfff8>;
0052 next-level-cache = <&l2>;
0053 };
0054
0055 cpu3: cpu@3 {
0056 device_type = "cpu";
0057 compatible = "brcm,brahma-b53";
0058 reg = <0x3>;
0059 enable-method = "spin-table";
0060 cpu-release-addr = <0x0 0xfff8>;
0061 next-level-cache = <&l2>;
0062 };
0063
0064 l2: l2-cache0 {
0065 compatible = "cache";
0066 };
0067 };
0068
0069 axi@81000000 {
0070 compatible = "simple-bus";
0071 #address-cells = <1>;
0072 #size-cells = <1>;
0073 ranges = <0x00 0x00 0x81000000 0x4000>;
0074
0075 gic: interrupt-controller@1000 {
0076 compatible = "arm,gic-400";
0077 #interrupt-cells = <3>;
0078 #address-cells = <0>;
0079 interrupt-controller;
0080 reg = <0x1000 0x1000>,
0081 <0x2000 0x2000>;
0082 };
0083 };
0084
0085 timer {
0086 compatible = "arm,armv8-timer";
0087 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
0088 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
0089 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
0090 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
0091 };
0092
0093 pmu {
0094 compatible = "arm,cortex-a53-pmu";
0095 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
0096 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
0097 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
0098 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
0099 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
0100 };
0101
0102 clocks {
0103 periph_clk: periph_clk {
0104 compatible = "fixed-clock";
0105 #clock-cells = <0>;
0106 clock-frequency = <50000000>;
0107 clock-output-names = "periph";
0108 };
0109 };
0110
0111 soc {
0112 compatible = "simple-bus";
0113 #address-cells = <1>;
0114 #size-cells = <1>;
0115 ranges = <0x00 0x00 0x80000000 0x281000>;
0116
0117 enet: ethernet@2000 {
0118 compatible = "brcm,bcm4908-enet";
0119 reg = <0x2000 0x1000>;
0120
0121 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
0122 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
0123 interrupt-names = "rx", "tx";
0124 };
0125
0126 usb_phy: usb-phy@c200 {
0127 compatible = "brcm,bcm4908-usb-phy";
0128 reg = <0xc200 0x100>;
0129 reg-names = "ctrl";
0130 power-domains = <&pmb BCM_PMB_HOST_USB>;
0131 dr_mode = "host";
0132 brcm,has-xhci;
0133 brcm,has-eohci;
0134 #phy-cells = <1>;
0135 status = "disabled";
0136 };
0137
0138 ehci: usb@c300 {
0139 compatible = "generic-ehci";
0140 reg = <0xc300 0x100>;
0141 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0142 phys = <&usb_phy PHY_TYPE_USB2>;
0143 status = "disabled";
0144 };
0145
0146 ohci: usb@c400 {
0147 compatible = "generic-ohci";
0148 reg = <0xc400 0x100>;
0149 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
0150 phys = <&usb_phy PHY_TYPE_USB2>;
0151 status = "disabled";
0152 };
0153
0154 xhci: usb@d000 {
0155 compatible = "generic-xhci";
0156 reg = <0xd000 0x8c8>;
0157 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
0158 phys = <&usb_phy PHY_TYPE_USB3>;
0159 status = "disabled";
0160 };
0161
0162 bus@80000 {
0163 compatible = "simple-bus";
0164 #size-cells = <1>;
0165 #address-cells = <1>;
0166 ranges = <0 0x80000 0x50000>;
0167
0168 ethernet-switch@0 {
0169 compatible = "brcm,bcm4908-switch";
0170 reg = <0x0 0x40000>,
0171 <0x40000 0x110>,
0172 <0x40340 0x30>,
0173 <0x40380 0x30>,
0174 <0x40600 0x34>,
0175 <0x40800 0x208>;
0176 reg-names = "core", "reg", "intrl2_0",
0177 "intrl2_1", "fcb", "acb";
0178 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
0179 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
0180 brcm,num-gphy = <5>;
0181 brcm,num-rgmii-ports = <2>;
0182
0183 #address-cells = <1>;
0184 #size-cells = <0>;
0185
0186 ports: ports {
0187 #address-cells = <1>;
0188 #size-cells = <0>;
0189
0190 port@0 {
0191 reg = <0>;
0192 phy-mode = "internal";
0193 phy-handle = <&phy8>;
0194 };
0195
0196 port@1 {
0197 reg = <1>;
0198 phy-mode = "internal";
0199 phy-handle = <&phy9>;
0200 };
0201
0202 port@2 {
0203 reg = <2>;
0204 phy-mode = "internal";
0205 phy-handle = <&phy10>;
0206 };
0207
0208 port@3 {
0209 reg = <3>;
0210 phy-mode = "internal";
0211 phy-handle = <&phy11>;
0212 };
0213
0214 port@8 {
0215 reg = <8>;
0216 phy-mode = "internal";
0217 ethernet = <&enet>;
0218
0219 fixed-link {
0220 speed = <1000>;
0221 full-duplex;
0222 };
0223 };
0224 };
0225 };
0226
0227 mdio: mdio@405c0 {
0228 compatible = "brcm,unimac-mdio";
0229 reg = <0x405c0 0x8>;
0230 reg-names = "mdio";
0231 #size-cells = <0>;
0232 #address-cells = <1>;
0233
0234 phy8: ethernet-phy@8 {
0235 reg = <8>;
0236 };
0237
0238 phy9: ethernet-phy@9 {
0239 reg = <9>;
0240 };
0241
0242 phy10: ethernet-phy@a {
0243 reg = <10>;
0244 };
0245
0246 phy11: ethernet-phy@b {
0247 reg = <11>;
0248 };
0249
0250 phy12: ethernet-phy@c {
0251 reg = <12>;
0252 };
0253 };
0254 };
0255
0256 procmon: syscon@280000 {
0257 compatible = "simple-bus";
0258 reg = <0x280000 0x1000>;
0259 ranges;
0260
0261 #address-cells = <1>;
0262 #size-cells = <1>;
0263
0264 pmb: power-controller@2800c0 {
0265 compatible = "brcm,bcm4908-pmb";
0266 reg = <0x2800c0 0x40>;
0267 #power-domain-cells = <1>;
0268 };
0269 };
0270 };
0271
0272 bus@ff800000 {
0273 compatible = "simple-bus";
0274 #address-cells = <1>;
0275 #size-cells = <1>;
0276 ranges = <0x00 0x00 0xff800000 0x3000>;
0277
0278 twd: timer-mfd@400 {
0279 compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
0280 reg = <0x400 0x4c>;
0281 ranges = <0x0 0x400 0x4c>;
0282
0283 #address-cells = <1>;
0284 #size-cells = <1>;
0285
0286 watchdog@28 {
0287 compatible = "brcm,bcm6345-wdt";
0288 reg = <0x28 0x8>;
0289 };
0290 };
0291
0292 gpio0: gpio-controller@500 {
0293 compatible = "brcm,bcm6345-gpio";
0294 reg-names = "dirout", "dat";
0295 reg = <0x500 0x28>, <0x528 0x28>;
0296
0297 #gpio-cells = <2>;
0298 gpio-controller;
0299 };
0300
0301 pinctrl@560 {
0302 compatible = "brcm,bcm4908-pinctrl";
0303 reg = <0x560 0x10>;
0304
0305 pins_led_0_a: led_0-a-pins {
0306 function = "led_0";
0307 groups = "led_0_grp_a";
0308 };
0309
0310 pins_led_1_a: led_1-a-pins {
0311 function = "led_1";
0312 groups = "led_1_grp_a";
0313 };
0314
0315 pins_led_2_a: led_2-a-pins {
0316 function = "led_2";
0317 groups = "led_2_grp_a";
0318 };
0319
0320 pins_led_3_a: led_3-a-pins {
0321 function = "led_3";
0322 groups = "led_3_grp_a";
0323 };
0324
0325 pins_led_4_a: led_4-a-pins {
0326 function = "led_4";
0327 groups = "led_4_grp_a";
0328 };
0329
0330 pins_led_5_a: led_5-a-pins {
0331 function = "led_5";
0332 groups = "led_5_grp_a";
0333 };
0334
0335 pins_led_6_a: led_6-a-pins {
0336 function = "led_6";
0337 groups = "led_6_grp_a";
0338 };
0339
0340 pins_led_7_a: led_7-a-pins {
0341 function = "led_7";
0342 groups = "led_7_grp_a";
0343 };
0344
0345 pins_led_8_a: led_8-a-pins {
0346 function = "led_8";
0347 groups = "led_8_grp_a";
0348 };
0349
0350 pins_led_9_a: led_9-a-pins {
0351 function = "led_9";
0352 groups = "led_9_grp_a";
0353 };
0354
0355 pins_led_21_a: led_21-a-pins {
0356 function = "led_21";
0357 groups = "led_21_grp_a";
0358 };
0359
0360 pins_led_22_a: led_22-a-pins {
0361 function = "led_22";
0362 groups = "led_22_grp_a";
0363 };
0364
0365 pins_led_26_a: led_26-a-pins {
0366 function = "led_26";
0367 groups = "led_26_grp_a";
0368 };
0369
0370 pins_led_27_a: led_27-a-pins {
0371 function = "led_27";
0372 groups = "led_27_grp_a";
0373 };
0374
0375 pins_led_28_a: led_28-a-pins {
0376 function = "led_28";
0377 groups = "led_28_grp_a";
0378 };
0379
0380 pins_led_29_a: led_29-a-pins {
0381 function = "led_29";
0382 groups = "led_29_grp_a";
0383 };
0384
0385 pins_led_30_a: led_30-a-pins {
0386 function = "led_30";
0387 groups = "led_30_grp_a";
0388 };
0389
0390 pins_hs_uart: hs_uart-pins {
0391 function = "hs_uart";
0392 groups = "hs_uart_grp";
0393 };
0394
0395 pins_i2c_a: i2c-a-pins {
0396 function = "i2c";
0397 groups = "i2c_grp_a";
0398 };
0399
0400 pins_i2c_b: i2c-b-pins {
0401 function = "i2c";
0402 groups = "i2c_grp_b";
0403 };
0404
0405 pins_i2s: i2s-pins {
0406 function = "i2s";
0407 groups = "i2s_grp";
0408 };
0409
0410 pins_nand_ctrl: nand_ctrl-pins {
0411 function = "nand_ctrl";
0412 groups = "nand_ctrl_grp";
0413 };
0414
0415 pins_nand_data: nand_data-pins {
0416 function = "nand_data";
0417 groups = "nand_data_grp";
0418 };
0419
0420 pins_emmc_ctrl: emmc_ctrl-pins {
0421 function = "emmc_ctrl";
0422 groups = "emmc_ctrl_grp";
0423 };
0424
0425 pins_usb0_pwr: usb0_pwr-pins {
0426 function = "usb0_pwr";
0427 groups = "usb0_pwr_grp";
0428 };
0429
0430 pins_usb1_pwr: usb1_pwr-pins {
0431 function = "usb1_pwr";
0432 groups = "usb1_pwr_grp";
0433 };
0434 };
0435
0436 uart0: serial@640 {
0437 compatible = "brcm,bcm6345-uart";
0438 reg = <0x640 0x18>;
0439 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
0440 clocks = <&periph_clk>;
0441 clock-names = "refclk";
0442 status = "okay";
0443 };
0444
0445 nand-controller@1800 {
0446 #address-cells = <1>;
0447 #size-cells = <0>;
0448 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
0449 reg = <0x1800 0x600>, <0x2000 0x10>;
0450 reg-names = "nand", "nand-int-base";
0451 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
0452 interrupt-names = "nand";
0453 status = "okay";
0454
0455 nandcs: nand@0 {
0456 compatible = "brcm,nandcs";
0457 reg = <0>;
0458 };
0459 };
0460
0461 i2c@2100 {
0462 compatible = "brcm,brcmper-i2c";
0463 reg = <0x2100 0x58>;
0464 clock-frequency = <97500>;
0465 pinctrl-names = "default";
0466 pinctrl-0 = <&pins_i2c_a>;
0467 status = "disabled";
0468 };
0469
0470 misc@2600 {
0471 compatible = "brcm,misc", "simple-mfd";
0472 reg = <0x2600 0xe4>;
0473
0474 #address-cells = <1>;
0475 #size-cells = <1>;
0476 ranges = <0x00 0x2600 0xe4>;
0477
0478 reset-controller@2644 {
0479 compatible = "brcm,bcm4908-misc-pcie-reset";
0480 reg = <0x44 0x04>;
0481 #reset-cells = <1>;
0482 };
0483 };
0484 };
0485
0486 reboot {
0487 compatible = "syscon-reboot";
0488 regmap = <&twd>;
0489 offset = <0x34>;
0490 mask = <1>;
0491 };
0492 };
