0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * DTS file for AMD Seattle Clocks
0004 *
0005 * Copyright (C) 2014 Advanced Micro Devices, Inc.
0006 */
0007
0008 adl3clk_100mhz: clk100mhz_0 {
0009 compatible = "fixed-clock";
0010 #clock-cells = <0>;
0011 clock-frequency = <100000000>;
0012 clock-output-names = "adl3clk_100mhz";
0013 };
0014
0015 ccpclk_375mhz: clk375mhz {
0016 compatible = "fixed-clock";
0017 #clock-cells = <0>;
0018 clock-frequency = <375000000>;
0019 clock-output-names = "ccpclk_375mhz";
0020 };
0021
0022 sataclk_333mhz: clk333mhz {
0023 compatible = "fixed-clock";
0024 #clock-cells = <0>;
0025 clock-frequency = <333000000>;
0026 clock-output-names = "sataclk_333mhz";
0027 };
0028
0029 pcieclk_500mhz: clk500mhz_0 {
0030 compatible = "fixed-clock";
0031 #clock-cells = <0>;
0032 clock-frequency = <500000000>;
0033 clock-output-names = "pcieclk_500mhz";
0034 };
0035
0036 dmaclk_500mhz: clk500mhz_1 {
0037 compatible = "fixed-clock";
0038 #clock-cells = <0>;
0039 clock-frequency = <500000000>;
0040 clock-output-names = "dmaclk_500mhz";
0041 };
0042
0043 miscclk_250mhz: clk250mhz_4 {
0044 compatible = "fixed-clock";
0045 #clock-cells = <0>;
0046 clock-frequency = <250000000>;
0047 clock-output-names = "miscclk_250mhz";
0048 };
0049
0050 uartspiclk_100mhz: clk100mhz_1 {
0051 compatible = "fixed-clock";
0052 #clock-cells = <0>;
0053 clock-frequency = <100000000>;
0054 clock-output-names = "uartspiclk_100mhz";
0055 };
