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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/arch/arm/vfp/vfpmodule.c
0004  *
0005  *  Copyright (C) 2004 ARM Limited.
0006  *  Written by Deep Blue Solutions Limited.
0007  */
0008 #include <linux/types.h>
0009 #include <linux/cpu.h>
0010 #include <linux/cpu_pm.h>
0011 #include <linux/hardirq.h>
0012 #include <linux/kernel.h>
0013 #include <linux/notifier.h>
0014 #include <linux/signal.h>
0015 #include <linux/sched/signal.h>
0016 #include <linux/smp.h>
0017 #include <linux/init.h>
0018 #include <linux/uaccess.h>
0019 #include <linux/user.h>
0020 #include <linux/export.h>
0021 
0022 #include <asm/cp15.h>
0023 #include <asm/cputype.h>
0024 #include <asm/system_info.h>
0025 #include <asm/thread_notify.h>
0026 #include <asm/traps.h>
0027 #include <asm/vfp.h>
0028 
0029 #include "vfpinstr.h"
0030 #include "vfp.h"
0031 
0032 /*
0033  * Our undef handlers (in entry.S)
0034  */
0035 asmlinkage void vfp_support_entry(void);
0036 asmlinkage void vfp_null_entry(void);
0037 
0038 asmlinkage void (*vfp_vector)(void) = vfp_null_entry;
0039 
0040 /*
0041  * Dual-use variable.
0042  * Used in startup: set to non-zero if VFP checks fail
0043  * After startup, holds VFP architecture
0044  */
0045 static unsigned int __initdata VFP_arch;
0046 
0047 /*
0048  * The pointer to the vfpstate structure of the thread which currently
0049  * owns the context held in the VFP hardware, or NULL if the hardware
0050  * context is invalid.
0051  *
0052  * For UP, this is sufficient to tell which thread owns the VFP context.
0053  * However, for SMP, we also need to check the CPU number stored in the
0054  * saved state too to catch migrations.
0055  */
0056 union vfp_state *vfp_current_hw_state[NR_CPUS];
0057 
0058 /*
0059  * Is 'thread's most up to date state stored in this CPUs hardware?
0060  * Must be called from non-preemptible context.
0061  */
0062 static bool vfp_state_in_hw(unsigned int cpu, struct thread_info *thread)
0063 {
0064 #ifdef CONFIG_SMP
0065     if (thread->vfpstate.hard.cpu != cpu)
0066         return false;
0067 #endif
0068     return vfp_current_hw_state[cpu] == &thread->vfpstate;
0069 }
0070 
0071 /*
0072  * Force a reload of the VFP context from the thread structure.  We do
0073  * this by ensuring that access to the VFP hardware is disabled, and
0074  * clear vfp_current_hw_state.  Must be called from non-preemptible context.
0075  */
0076 static void vfp_force_reload(unsigned int cpu, struct thread_info *thread)
0077 {
0078     if (vfp_state_in_hw(cpu, thread)) {
0079         fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
0080         vfp_current_hw_state[cpu] = NULL;
0081     }
0082 #ifdef CONFIG_SMP
0083     thread->vfpstate.hard.cpu = NR_CPUS;
0084 #endif
0085 }
0086 
0087 /*
0088  * Per-thread VFP initialization.
0089  */
0090 static void vfp_thread_flush(struct thread_info *thread)
0091 {
0092     union vfp_state *vfp = &thread->vfpstate;
0093     unsigned int cpu;
0094 
0095     /*
0096      * Disable VFP to ensure we initialize it first.  We must ensure
0097      * that the modification of vfp_current_hw_state[] and hardware
0098      * disable are done for the same CPU and without preemption.
0099      *
0100      * Do this first to ensure that preemption won't overwrite our
0101      * state saving should access to the VFP be enabled at this point.
0102      */
0103     cpu = get_cpu();
0104     if (vfp_current_hw_state[cpu] == vfp)
0105         vfp_current_hw_state[cpu] = NULL;
0106     fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
0107     put_cpu();
0108 
0109     memset(vfp, 0, sizeof(union vfp_state));
0110 
0111     vfp->hard.fpexc = FPEXC_EN;
0112     vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
0113 #ifdef CONFIG_SMP
0114     vfp->hard.cpu = NR_CPUS;
0115 #endif
0116 }
0117 
0118 static void vfp_thread_exit(struct thread_info *thread)
0119 {
0120     /* release case: Per-thread VFP cleanup. */
0121     union vfp_state *vfp = &thread->vfpstate;
0122     unsigned int cpu = get_cpu();
0123 
0124     if (vfp_current_hw_state[cpu] == vfp)
0125         vfp_current_hw_state[cpu] = NULL;
0126     put_cpu();
0127 }
0128 
0129 static void vfp_thread_copy(struct thread_info *thread)
0130 {
0131     struct thread_info *parent = current_thread_info();
0132 
0133     vfp_sync_hwstate(parent);
0134     thread->vfpstate = parent->vfpstate;
0135 #ifdef CONFIG_SMP
0136     thread->vfpstate.hard.cpu = NR_CPUS;
0137 #endif
0138 }
0139 
0140 /*
0141  * When this function is called with the following 'cmd's, the following
0142  * is true while this function is being run:
0143  *  THREAD_NOFTIFY_SWTICH:
0144  *   - the previously running thread will not be scheduled onto another CPU.
0145  *   - the next thread to be run (v) will not be running on another CPU.
0146  *   - thread->cpu is the local CPU number
0147  *   - not preemptible as we're called in the middle of a thread switch
0148  *  THREAD_NOTIFY_FLUSH:
0149  *   - the thread (v) will be running on the local CPU, so
0150  *  v === current_thread_info()
0151  *   - thread->cpu is the local CPU number at the time it is accessed,
0152  *  but may change at any time.
0153  *   - we could be preempted if tree preempt rcu is enabled, so
0154  *  it is unsafe to use thread->cpu.
0155  *  THREAD_NOTIFY_EXIT
0156  *   - we could be preempted if tree preempt rcu is enabled, so
0157  *  it is unsafe to use thread->cpu.
0158  */
0159 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
0160 {
0161     struct thread_info *thread = v;
0162     u32 fpexc;
0163 #ifdef CONFIG_SMP
0164     unsigned int cpu;
0165 #endif
0166 
0167     switch (cmd) {
0168     case THREAD_NOTIFY_SWITCH:
0169         fpexc = fmrx(FPEXC);
0170 
0171 #ifdef CONFIG_SMP
0172         cpu = thread->cpu;
0173 
0174         /*
0175          * On SMP, if VFP is enabled, save the old state in
0176          * case the thread migrates to a different CPU. The
0177          * restoring is done lazily.
0178          */
0179         if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu])
0180             vfp_save_state(vfp_current_hw_state[cpu], fpexc);
0181 #endif
0182 
0183         /*
0184          * Always disable VFP so we can lazily save/restore the
0185          * old state.
0186          */
0187         fmxr(FPEXC, fpexc & ~FPEXC_EN);
0188         break;
0189 
0190     case THREAD_NOTIFY_FLUSH:
0191         vfp_thread_flush(thread);
0192         break;
0193 
0194     case THREAD_NOTIFY_EXIT:
0195         vfp_thread_exit(thread);
0196         break;
0197 
0198     case THREAD_NOTIFY_COPY:
0199         vfp_thread_copy(thread);
0200         break;
0201     }
0202 
0203     return NOTIFY_DONE;
0204 }
0205 
0206 static struct notifier_block vfp_notifier_block = {
0207     .notifier_call  = vfp_notifier,
0208 };
0209 
0210 /*
0211  * Raise a SIGFPE for the current process.
0212  * sicode describes the signal being raised.
0213  */
0214 static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
0215 {
0216     /*
0217      * This is the same as NWFPE, because it's not clear what
0218      * this is used for
0219      */
0220     current->thread.error_code = 0;
0221     current->thread.trap_no = 6;
0222 
0223     send_sig_fault(SIGFPE, sicode,
0224                (void __user *)(instruction_pointer(regs) - 4),
0225                current);
0226 }
0227 
0228 static void vfp_panic(char *reason, u32 inst)
0229 {
0230     int i;
0231 
0232     pr_err("VFP: Error: %s\n", reason);
0233     pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
0234         fmrx(FPEXC), fmrx(FPSCR), inst);
0235     for (i = 0; i < 32; i += 2)
0236         pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
0237                i, vfp_get_float(i), i+1, vfp_get_float(i+1));
0238 }
0239 
0240 /*
0241  * Process bitmask of exception conditions.
0242  */
0243 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
0244 {
0245     int si_code = 0;
0246 
0247     pr_debug("VFP: raising exceptions %08x\n", exceptions);
0248 
0249     if (exceptions == VFP_EXCEPTION_ERROR) {
0250         vfp_panic("unhandled bounce", inst);
0251         vfp_raise_sigfpe(FPE_FLTINV, regs);
0252         return;
0253     }
0254 
0255     /*
0256      * If any of the status flags are set, update the FPSCR.
0257      * Comparison instructions always return at least one of
0258      * these flags set.
0259      */
0260     if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
0261         fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
0262 
0263     fpscr |= exceptions;
0264 
0265     fmxr(FPSCR, fpscr);
0266 
0267 #define RAISE(stat,en,sig)              \
0268     if (exceptions & stat && fpscr & en)        \
0269         si_code = sig;
0270 
0271     /*
0272      * These are arranged in priority order, least to highest.
0273      */
0274     RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV);
0275     RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
0276     RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
0277     RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
0278     RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
0279 
0280     if (si_code)
0281         vfp_raise_sigfpe(si_code, regs);
0282 }
0283 
0284 /*
0285  * Emulate a VFP instruction.
0286  */
0287 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
0288 {
0289     u32 exceptions = VFP_EXCEPTION_ERROR;
0290 
0291     pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
0292 
0293     if (INST_CPRTDO(inst)) {
0294         if (!INST_CPRT(inst)) {
0295             /*
0296              * CPDO
0297              */
0298             if (vfp_single(inst)) {
0299                 exceptions = vfp_single_cpdo(inst, fpscr);
0300             } else {
0301                 exceptions = vfp_double_cpdo(inst, fpscr);
0302             }
0303         } else {
0304             /*
0305              * A CPRT instruction can not appear in FPINST2, nor
0306              * can it cause an exception.  Therefore, we do not
0307              * have to emulate it.
0308              */
0309         }
0310     } else {
0311         /*
0312          * A CPDT instruction can not appear in FPINST2, nor can
0313          * it cause an exception.  Therefore, we do not have to
0314          * emulate it.
0315          */
0316     }
0317     return exceptions & ~VFP_NAN_FLAG;
0318 }
0319 
0320 /*
0321  * Package up a bounce condition.
0322  */
0323 void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
0324 {
0325     u32 fpscr, orig_fpscr, fpsid, exceptions;
0326 
0327     pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
0328 
0329     /*
0330      * At this point, FPEXC can have the following configuration:
0331      *
0332      *  EX DEX IXE
0333      *  0   1   x   - synchronous exception
0334      *  1   x   0   - asynchronous exception
0335      *  1   x   1   - sychronous on VFP subarch 1 and asynchronous on later
0336      *  0   0   1   - synchronous on VFP9 (non-standard subarch 1
0337      *                implementation), undefined otherwise
0338      *
0339      * Clear various bits and enable access to the VFP so we can
0340      * handle the bounce.
0341      */
0342     fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
0343 
0344     fpsid = fmrx(FPSID);
0345     orig_fpscr = fpscr = fmrx(FPSCR);
0346 
0347     /*
0348      * Check for the special VFP subarch 1 and FPSCR.IXE bit case
0349      */
0350     if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT)
0351         && (fpscr & FPSCR_IXE)) {
0352         /*
0353          * Synchronous exception, emulate the trigger instruction
0354          */
0355         goto emulate;
0356     }
0357 
0358     if (fpexc & FPEXC_EX) {
0359 #ifndef CONFIG_CPU_FEROCEON
0360         /*
0361          * Asynchronous exception. The instruction is read from FPINST
0362          * and the interrupted instruction has to be restarted.
0363          */
0364         trigger = fmrx(FPINST);
0365         regs->ARM_pc -= 4;
0366 #endif
0367     } else if (!(fpexc & FPEXC_DEX)) {
0368         /*
0369          * Illegal combination of bits. It can be caused by an
0370          * unallocated VFP instruction but with FPSCR.IXE set and not
0371          * on VFP subarch 1.
0372          */
0373          vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
0374         goto exit;
0375     }
0376 
0377     /*
0378      * Modify fpscr to indicate the number of iterations remaining.
0379      * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
0380      * whether FPEXC.VECITR or FPSCR.LEN is used.
0381      */
0382     if (fpexc & (FPEXC_EX | FPEXC_VV)) {
0383         u32 len;
0384 
0385         len = fpexc + (1 << FPEXC_LENGTH_BIT);
0386 
0387         fpscr &= ~FPSCR_LENGTH_MASK;
0388         fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
0389     }
0390 
0391     /*
0392      * Handle the first FP instruction.  We used to take note of the
0393      * FPEXC bounce reason, but this appears to be unreliable.
0394      * Emulate the bounced instruction instead.
0395      */
0396     exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
0397     if (exceptions)
0398         vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
0399 
0400     /*
0401      * If there isn't a second FP instruction, exit now. Note that
0402      * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
0403      */
0404     if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))
0405         goto exit;
0406 
0407     /*
0408      * The barrier() here prevents fpinst2 being read
0409      * before the condition above.
0410      */
0411     barrier();
0412     trigger = fmrx(FPINST2);
0413 
0414  emulate:
0415     exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
0416     if (exceptions)
0417         vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
0418  exit:
0419     preempt_enable();
0420 }
0421 
0422 static void vfp_enable(void *unused)
0423 {
0424     u32 access;
0425 
0426     BUG_ON(preemptible());
0427     access = get_copro_access();
0428 
0429     /*
0430      * Enable full access to VFP (cp10 and cp11)
0431      */
0432     set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
0433 }
0434 
0435 /* Called by platforms on which we want to disable VFP because it may not be
0436  * present on all CPUs within a SMP complex. Needs to be called prior to
0437  * vfp_init().
0438  */
0439 void __init vfp_disable(void)
0440 {
0441     if (VFP_arch) {
0442         pr_debug("%s: should be called prior to vfp_init\n", __func__);
0443         return;
0444     }
0445     VFP_arch = 1;
0446 }
0447 
0448 #ifdef CONFIG_CPU_PM
0449 static int vfp_pm_suspend(void)
0450 {
0451     struct thread_info *ti = current_thread_info();
0452     u32 fpexc = fmrx(FPEXC);
0453 
0454     /* if vfp is on, then save state for resumption */
0455     if (fpexc & FPEXC_EN) {
0456         pr_debug("%s: saving vfp state\n", __func__);
0457         vfp_save_state(&ti->vfpstate, fpexc);
0458 
0459         /* disable, just in case */
0460         fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
0461     } else if (vfp_current_hw_state[ti->cpu]) {
0462 #ifndef CONFIG_SMP
0463         fmxr(FPEXC, fpexc | FPEXC_EN);
0464         vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc);
0465         fmxr(FPEXC, fpexc);
0466 #endif
0467     }
0468 
0469     /* clear any information we had about last context state */
0470     vfp_current_hw_state[ti->cpu] = NULL;
0471 
0472     return 0;
0473 }
0474 
0475 static void vfp_pm_resume(void)
0476 {
0477     /* ensure we have access to the vfp */
0478     vfp_enable(NULL);
0479 
0480     /* and disable it to ensure the next usage restores the state */
0481     fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
0482 }
0483 
0484 static int vfp_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd,
0485     void *v)
0486 {
0487     switch (cmd) {
0488     case CPU_PM_ENTER:
0489         vfp_pm_suspend();
0490         break;
0491     case CPU_PM_ENTER_FAILED:
0492     case CPU_PM_EXIT:
0493         vfp_pm_resume();
0494         break;
0495     }
0496     return NOTIFY_OK;
0497 }
0498 
0499 static struct notifier_block vfp_cpu_pm_notifier_block = {
0500     .notifier_call = vfp_cpu_pm_notifier,
0501 };
0502 
0503 static void vfp_pm_init(void)
0504 {
0505     cpu_pm_register_notifier(&vfp_cpu_pm_notifier_block);
0506 }
0507 
0508 #else
0509 static inline void vfp_pm_init(void) { }
0510 #endif /* CONFIG_CPU_PM */
0511 
0512 /*
0513  * Ensure that the VFP state stored in 'thread->vfpstate' is up to date
0514  * with the hardware state.
0515  */
0516 void vfp_sync_hwstate(struct thread_info *thread)
0517 {
0518     unsigned int cpu = get_cpu();
0519 
0520     if (vfp_state_in_hw(cpu, thread)) {
0521         u32 fpexc = fmrx(FPEXC);
0522 
0523         /*
0524          * Save the last VFP state on this CPU.
0525          */
0526         fmxr(FPEXC, fpexc | FPEXC_EN);
0527         vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN);
0528         fmxr(FPEXC, fpexc);
0529     }
0530 
0531     put_cpu();
0532 }
0533 
0534 /* Ensure that the thread reloads the hardware VFP state on the next use. */
0535 void vfp_flush_hwstate(struct thread_info *thread)
0536 {
0537     unsigned int cpu = get_cpu();
0538 
0539     vfp_force_reload(cpu, thread);
0540 
0541     put_cpu();
0542 }
0543 
0544 /*
0545  * Save the current VFP state into the provided structures and prepare
0546  * for entry into a new function (signal handler).
0547  */
0548 int vfp_preserve_user_clear_hwstate(struct user_vfp *ufp,
0549                     struct user_vfp_exc *ufp_exc)
0550 {
0551     struct thread_info *thread = current_thread_info();
0552     struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
0553 
0554     /* Ensure that the saved hwstate is up-to-date. */
0555     vfp_sync_hwstate(thread);
0556 
0557     /*
0558      * Copy the floating point registers. There can be unused
0559      * registers see asm/hwcap.h for details.
0560      */
0561     memcpy(&ufp->fpregs, &hwstate->fpregs, sizeof(hwstate->fpregs));
0562 
0563     /*
0564      * Copy the status and control register.
0565      */
0566     ufp->fpscr = hwstate->fpscr;
0567 
0568     /*
0569      * Copy the exception registers.
0570      */
0571     ufp_exc->fpexc = hwstate->fpexc;
0572     ufp_exc->fpinst = hwstate->fpinst;
0573     ufp_exc->fpinst2 = hwstate->fpinst2;
0574 
0575     /* Ensure that VFP is disabled. */
0576     vfp_flush_hwstate(thread);
0577 
0578     /*
0579      * As per the PCS, clear the length and stride bits for function
0580      * entry.
0581      */
0582     hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
0583     return 0;
0584 }
0585 
0586 /* Sanitise and restore the current VFP state from the provided structures. */
0587 int vfp_restore_user_hwstate(struct user_vfp *ufp, struct user_vfp_exc *ufp_exc)
0588 {
0589     struct thread_info *thread = current_thread_info();
0590     struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
0591     unsigned long fpexc;
0592 
0593     /* Disable VFP to avoid corrupting the new thread state. */
0594     vfp_flush_hwstate(thread);
0595 
0596     /*
0597      * Copy the floating point registers. There can be unused
0598      * registers see asm/hwcap.h for details.
0599      */
0600     memcpy(&hwstate->fpregs, &ufp->fpregs, sizeof(hwstate->fpregs));
0601     /*
0602      * Copy the status and control register.
0603      */
0604     hwstate->fpscr = ufp->fpscr;
0605 
0606     /*
0607      * Sanitise and restore the exception registers.
0608      */
0609     fpexc = ufp_exc->fpexc;
0610 
0611     /* Ensure the VFP is enabled. */
0612     fpexc |= FPEXC_EN;
0613 
0614     /* Ensure FPINST2 is invalid and the exception flag is cleared. */
0615     fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
0616     hwstate->fpexc = fpexc;
0617 
0618     hwstate->fpinst = ufp_exc->fpinst;
0619     hwstate->fpinst2 = ufp_exc->fpinst2;
0620 
0621     return 0;
0622 }
0623 
0624 /*
0625  * VFP hardware can lose all context when a CPU goes offline.
0626  * As we will be running in SMP mode with CPU hotplug, we will save the
0627  * hardware state at every thread switch.  We clear our held state when
0628  * a CPU has been killed, indicating that the VFP hardware doesn't contain
0629  * a threads VFP state.  When a CPU starts up, we re-enable access to the
0630  * VFP hardware. The callbacks below are called on the CPU which
0631  * is being offlined/onlined.
0632  */
0633 static int vfp_dying_cpu(unsigned int cpu)
0634 {
0635     vfp_current_hw_state[cpu] = NULL;
0636     return 0;
0637 }
0638 
0639 static int vfp_starting_cpu(unsigned int unused)
0640 {
0641     vfp_enable(NULL);
0642     return 0;
0643 }
0644 
0645 #ifdef CONFIG_KERNEL_MODE_NEON
0646 
0647 static int vfp_kmode_exception(struct pt_regs *regs, unsigned int instr)
0648 {
0649     /*
0650      * If we reach this point, a floating point exception has been raised
0651      * while running in kernel mode. If the NEON/VFP unit was enabled at the
0652      * time, it means a VFP instruction has been issued that requires
0653      * software assistance to complete, something which is not currently
0654      * supported in kernel mode.
0655      * If the NEON/VFP unit was disabled, and the location pointed to below
0656      * is properly preceded by a call to kernel_neon_begin(), something has
0657      * caused the task to be scheduled out and back in again. In this case,
0658      * rebuilding and running with CONFIG_DEBUG_ATOMIC_SLEEP enabled should
0659      * be helpful in localizing the problem.
0660      */
0661     if (fmrx(FPEXC) & FPEXC_EN)
0662         pr_crit("BUG: unsupported FP instruction in kernel mode\n");
0663     else
0664         pr_crit("BUG: FP instruction issued in kernel mode with FP unit disabled\n");
0665     pr_crit("FPEXC == 0x%08x\n", fmrx(FPEXC));
0666     return 1;
0667 }
0668 
0669 static struct undef_hook vfp_kmode_exception_hook[] = {{
0670     .instr_mask = 0xfe000000,
0671     .instr_val  = 0xf2000000,
0672     .cpsr_mask  = MODE_MASK | PSR_T_BIT,
0673     .cpsr_val   = SVC_MODE,
0674     .fn     = vfp_kmode_exception,
0675 }, {
0676     .instr_mask = 0xff100000,
0677     .instr_val  = 0xf4000000,
0678     .cpsr_mask  = MODE_MASK | PSR_T_BIT,
0679     .cpsr_val   = SVC_MODE,
0680     .fn     = vfp_kmode_exception,
0681 }, {
0682     .instr_mask = 0xef000000,
0683     .instr_val  = 0xef000000,
0684     .cpsr_mask  = MODE_MASK | PSR_T_BIT,
0685     .cpsr_val   = SVC_MODE | PSR_T_BIT,
0686     .fn     = vfp_kmode_exception,
0687 }, {
0688     .instr_mask = 0xff100000,
0689     .instr_val  = 0xf9000000,
0690     .cpsr_mask  = MODE_MASK | PSR_T_BIT,
0691     .cpsr_val   = SVC_MODE | PSR_T_BIT,
0692     .fn     = vfp_kmode_exception,
0693 }, {
0694     .instr_mask = 0x0c000e00,
0695     .instr_val  = 0x0c000a00,
0696     .cpsr_mask  = MODE_MASK,
0697     .cpsr_val   = SVC_MODE,
0698     .fn     = vfp_kmode_exception,
0699 }};
0700 
0701 static int __init vfp_kmode_exception_hook_init(void)
0702 {
0703     int i;
0704 
0705     for (i = 0; i < ARRAY_SIZE(vfp_kmode_exception_hook); i++)
0706         register_undef_hook(&vfp_kmode_exception_hook[i]);
0707     return 0;
0708 }
0709 subsys_initcall(vfp_kmode_exception_hook_init);
0710 
0711 /*
0712  * Kernel-side NEON support functions
0713  */
0714 void kernel_neon_begin(void)
0715 {
0716     struct thread_info *thread = current_thread_info();
0717     unsigned int cpu;
0718     u32 fpexc;
0719 
0720     /*
0721      * Kernel mode NEON is only allowed outside of interrupt context
0722      * with preemption disabled. This will make sure that the kernel
0723      * mode NEON register contents never need to be preserved.
0724      */
0725     BUG_ON(in_interrupt());
0726     cpu = get_cpu();
0727 
0728     fpexc = fmrx(FPEXC) | FPEXC_EN;
0729     fmxr(FPEXC, fpexc);
0730 
0731     /*
0732      * Save the userland NEON/VFP state. Under UP,
0733      * the owner could be a task other than 'current'
0734      */
0735     if (vfp_state_in_hw(cpu, thread))
0736         vfp_save_state(&thread->vfpstate, fpexc);
0737 #ifndef CONFIG_SMP
0738     else if (vfp_current_hw_state[cpu] != NULL)
0739         vfp_save_state(vfp_current_hw_state[cpu], fpexc);
0740 #endif
0741     vfp_current_hw_state[cpu] = NULL;
0742 }
0743 EXPORT_SYMBOL(kernel_neon_begin);
0744 
0745 void kernel_neon_end(void)
0746 {
0747     /* Disable the NEON/VFP unit. */
0748     fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
0749     put_cpu();
0750 }
0751 EXPORT_SYMBOL(kernel_neon_end);
0752 
0753 #endif /* CONFIG_KERNEL_MODE_NEON */
0754 
0755 static int __init vfp_detect(struct pt_regs *regs, unsigned int instr)
0756 {
0757     VFP_arch = UINT_MAX;    /* mark as not present */
0758     regs->ARM_pc += 4;
0759     return 0;
0760 }
0761 
0762 static struct undef_hook vfp_detect_hook __initdata = {
0763     .instr_mask = 0x0c000e00,
0764     .instr_val  = 0x0c000a00,
0765     .cpsr_mask  = MODE_MASK,
0766     .cpsr_val   = SVC_MODE,
0767     .fn     = vfp_detect,
0768 };
0769 
0770 /*
0771  * VFP support code initialisation.
0772  */
0773 static int __init vfp_init(void)
0774 {
0775     unsigned int vfpsid;
0776     unsigned int cpu_arch = cpu_architecture();
0777 
0778     /*
0779      * Enable the access to the VFP on all online CPUs so the
0780      * following test on FPSID will succeed.
0781      */
0782     if (cpu_arch >= CPU_ARCH_ARMv6)
0783         on_each_cpu(vfp_enable, NULL, 1);
0784 
0785     /*
0786      * First check that there is a VFP that we can use.
0787      * The handler is already setup to just log calls, so
0788      * we just need to read the VFPSID register.
0789      */
0790     register_undef_hook(&vfp_detect_hook);
0791     barrier();
0792     vfpsid = fmrx(FPSID);
0793     barrier();
0794     unregister_undef_hook(&vfp_detect_hook);
0795     vfp_vector = vfp_null_entry;
0796 
0797     pr_info("VFP support v0.3: ");
0798     if (VFP_arch) {
0799         pr_cont("not present\n");
0800         return 0;
0801     /* Extract the architecture on CPUID scheme */
0802     } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
0803         VFP_arch = vfpsid & FPSID_CPUID_ARCH_MASK;
0804         VFP_arch >>= FPSID_ARCH_BIT;
0805         /*
0806          * Check for the presence of the Advanced SIMD
0807          * load/store instructions, integer and single
0808          * precision floating point operations. Only check
0809          * for NEON if the hardware has the MVFR registers.
0810          */
0811         if (IS_ENABLED(CONFIG_NEON) &&
0812            (fmrx(MVFR1) & 0x000fff00) == 0x00011100)
0813             elf_hwcap |= HWCAP_NEON;
0814 
0815         if (IS_ENABLED(CONFIG_VFPv3)) {
0816             u32 mvfr0 = fmrx(MVFR0);
0817             if (((mvfr0 & MVFR0_DP_MASK) >> MVFR0_DP_BIT) == 0x2 ||
0818                 ((mvfr0 & MVFR0_SP_MASK) >> MVFR0_SP_BIT) == 0x2) {
0819                 elf_hwcap |= HWCAP_VFPv3;
0820                 /*
0821                  * Check for VFPv3 D16 and VFPv4 D16.  CPUs in
0822                  * this configuration only have 16 x 64bit
0823                  * registers.
0824                  */
0825                 if ((mvfr0 & MVFR0_A_SIMD_MASK) == 1)
0826                     /* also v4-D16 */
0827                     elf_hwcap |= HWCAP_VFPv3D16;
0828                 else
0829                     elf_hwcap |= HWCAP_VFPD32;
0830             }
0831 
0832             if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
0833                 elf_hwcap |= HWCAP_VFPv4;
0834         }
0835     /* Extract the architecture version on pre-cpuid scheme */
0836     } else {
0837         if (vfpsid & FPSID_NODOUBLE) {
0838             pr_cont("no double precision support\n");
0839             return 0;
0840         }
0841 
0842         VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT;
0843     }
0844 
0845     cpuhp_setup_state_nocalls(CPUHP_AP_ARM_VFP_STARTING,
0846                   "arm/vfp:starting", vfp_starting_cpu,
0847                   vfp_dying_cpu);
0848 
0849     vfp_vector = vfp_support_entry;
0850 
0851     thread_register_notifier(&vfp_notifier_block);
0852     vfp_pm_init();
0853 
0854     /*
0855      * We detected VFP, and the support code is
0856      * in place; report VFP support to userspace.
0857      */
0858     elf_hwcap |= HWCAP_VFP;
0859 
0860     pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n",
0861         (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
0862         VFP_arch,
0863         (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
0864         (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
0865         (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
0866 
0867     return 0;
0868 }
0869 
0870 core_initcall(vfp_init);