arm/vfp/vfpinstr.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  linux/arch/arm/vfp/vfpinstr.h
0004  *
0005  *  Copyright (C) 2004 ARM Limited.
0006  *  Written by Deep Blue Solutions Limited.
0007  *
0008  * VFP instruction masks.
0009  */
0010 #define INST_CPRTDO(inst)   (((inst) & 0x0f000000) == 0x0e000000)
0011 #define INST_CPRT(inst)     ((inst) & (1 << 4))
0012 #define INST_CPRT_L(inst)   ((inst) & (1 << 20))
0013 #define INST_CPRT_Rd(inst)  (((inst) & (15 << 12)) >> 12)
0014 #define INST_CPRT_OP(inst)  (((inst) >> 21) & 7)
0015 #define INST_CPNUM(inst)    ((inst) & 0xf00)
0016 #define CPNUM(cp)       ((cp) << 8)
0017
0018 #define FOP_MASK    (0x00b00040)
0019 #define FOP_FMAC    (0x00000000)
0020 #define FOP_FNMAC   (0x00000040)
0021 #define FOP_FMSC    (0x00100000)
0022 #define FOP_FNMSC   (0x00100040)
0023 #define FOP_FMUL    (0x00200000)
0024 #define FOP_FNMUL   (0x00200040)
0025 #define FOP_FADD    (0x00300000)
0026 #define FOP_FSUB    (0x00300040)
0027 #define FOP_FDIV    (0x00800000)
0028 #define FOP_EXT     (0x00b00040)
0029
0030 #define FOP_TO_IDX(inst)    ((inst & 0x00b00000) >> 20 | (inst & (1 << 6)) >> 4)
0031
0032 #define FEXT_MASK   (0x000f0080)
0033 #define FEXT_FCPY   (0x00000000)
0034 #define FEXT_FABS   (0x00000080)
0035 #define FEXT_FNEG   (0x00010000)
0036 #define FEXT_FSQRT  (0x00010080)
0037 #define FEXT_FCMP   (0x00040000)
0038 #define FEXT_FCMPE  (0x00040080)
0039 #define FEXT_FCMPZ  (0x00050000)
0040 #define FEXT_FCMPEZ (0x00050080)
0041 #define FEXT_FCVT   (0x00070080)
0042 #define FEXT_FUITO  (0x00080000)
0043 #define FEXT_FSITO  (0x00080080)
0044 #define FEXT_FTOUI  (0x000c0000)
0045 #define FEXT_FTOUIZ (0x000c0080)
0046 #define FEXT_FTOSI  (0x000d0000)
0047 #define FEXT_FTOSIZ (0x000d0080)
0048
0049 #define FEXT_TO_IDX(inst)   ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7)
0050
0051 #define vfp_get_sd(inst)    ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22)
0052 #define vfp_get_dd(inst)    ((inst & 0x0000f000) >> 12 | (inst & (1 << 22)) >> 18)
0053 #define vfp_get_sm(inst)    ((inst & 0x0000000f) << 1 | (inst & (1 << 5)) >> 5)
0054 #define vfp_get_dm(inst)    ((inst & 0x0000000f) | (inst & (1 << 5)) >> 1)
0055 #define vfp_get_sn(inst)    ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7)
0056 #define vfp_get_dn(inst)    ((inst & 0x000f0000) >> 16 | (inst & (1 << 7)) >> 3)
0057
0058 #define vfp_single(inst)    (((inst) & 0x0000f00) == 0xa00)
0059
0060 #define FPSCR_N (1 << 31)
0061 #define FPSCR_Z (1 << 30)
0062 #define FPSCR_C (1 << 29)
0063 #define FPSCR_V (1 << 28)
0064
0065 #ifdef CONFIG_AS_VFP_VMRS_FPINST
0066
0067 #define fmrx(_vfp_) ({          \
0068     u32 __v;            \
0069     asm(".fpu   vfpv2\n"    \
0070         "vmrs   %0, " #_vfp_    \
0071         : "=r" (__v) : : "cc"); \
0072     __v;                \
0073  })
0074
0075 #define fmxr(_vfp_,_var_)       \
0076     asm(".fpu   vfpv2\n"    \
0077         "vmsr   " #_vfp_ ", %0" \
0078        : : "r" (_var_) : "cc")
0079
0080 #else
0081
0082 #define vfpreg(_vfp_) #_vfp_
0083
0084 #define fmrx(_vfp_) ({          \
0085     u32 __v;            \
0086     asm("mrc p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx   %0, " #_vfp_    \
0087         : "=r" (__v) : : "cc"); \
0088     __v;                \
0089  })
0090
0091 #define fmxr(_vfp_,_var_)       \
0092     asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr   " #_vfp_ ", %0" \
0093        : : "r" (_var_) : "cc")
0094
0095 #endif
0096
0097 u32 vfp_single_cpdo(u32 inst, u32 fpscr);
0098 u32 vfp_single_cprt(u32 inst, u32 fpscr, struct pt_regs *regs);
0099
0100 u32 vfp_double_cpdo(u32 inst, u32 fpscr);