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0001 // SPDX-License-Identifier: GPL-2.0-only 0002 /* 0003 * arch/arm/probes/decode-thumb.c 0004 * 0005 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>. 0006 */ 0007 0008 #include <linux/stddef.h> 0009 #include <linux/kernel.h> 0010 #include <linux/module.h> 0011 0012 #include "decode.h" 0013 #include "decode-thumb.h" 0014 0015 0016 static const union decode_item t32_table_1110_100x_x0xx[] = { 0017 /* Load/store multiple instructions */ 0018 0019 /* Rn is PC 1110 100x x0xx 1111 xxxx xxxx xxxx xxxx */ 0020 DECODE_REJECT (0xfe4f0000, 0xe80f0000), 0021 0022 /* SRS 1110 1000 00x0 xxxx xxxx xxxx xxxx xxxx */ 0023 /* RFE 1110 1000 00x1 xxxx xxxx xxxx xxxx xxxx */ 0024 DECODE_REJECT (0xffc00000, 0xe8000000), 0025 /* SRS 1110 1001 10x0 xxxx xxxx xxxx xxxx xxxx */ 0026 /* RFE 1110 1001 10x1 xxxx xxxx xxxx xxxx xxxx */ 0027 DECODE_REJECT (0xffc00000, 0xe9800000), 0028 0029 /* STM Rn, {...pc} 1110 100x x0x0 xxxx 1xxx xxxx xxxx xxxx */ 0030 DECODE_REJECT (0xfe508000, 0xe8008000), 0031 /* LDM Rn, {...lr,pc} 1110 100x x0x1 xxxx 11xx xxxx xxxx xxxx */ 0032 DECODE_REJECT (0xfe50c000, 0xe810c000), 0033 /* LDM/STM Rn, {...sp} 1110 100x x0xx xxxx xx1x xxxx xxxx xxxx */ 0034 DECODE_REJECT (0xfe402000, 0xe8002000), 0035 0036 /* STMIA 1110 1000 10x0 xxxx xxxx xxxx xxxx xxxx */ 0037 /* LDMIA 1110 1000 10x1 xxxx xxxx xxxx xxxx xxxx */ 0038 /* STMDB 1110 1001 00x0 xxxx xxxx xxxx xxxx xxxx */ 0039 /* LDMDB 1110 1001 00x1 xxxx xxxx xxxx xxxx xxxx */ 0040 DECODE_CUSTOM (0xfe400000, 0xe8000000, PROBES_T32_LDMSTM), 0041 0042 DECODE_END 0043 }; 0044 0045 static const union decode_item t32_table_1110_100x_x1xx[] = { 0046 /* Load/store dual, load/store exclusive, table branch */ 0047 0048 /* STRD (immediate) 1110 1000 x110 xxxx xxxx xxxx xxxx xxxx */ 0049 /* LDRD (immediate) 1110 1000 x111 xxxx xxxx xxxx xxxx xxxx */ 0050 DECODE_OR (0xff600000, 0xe8600000), 0051 /* STRD (immediate) 1110 1001 x1x0 xxxx xxxx xxxx xxxx xxxx */ 0052 /* LDRD (immediate) 1110 1001 x1x1 xxxx xxxx xxxx xxxx xxxx */ 0053 DECODE_EMULATEX (0xff400000, 0xe9400000, PROBES_T32_LDRDSTRD, 0054 REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)), 0055 0056 /* TBB 1110 1000 1101 xxxx xxxx xxxx 0000 xxxx */ 0057 /* TBH 1110 1000 1101 xxxx xxxx xxxx 0001 xxxx */ 0058 DECODE_SIMULATEX(0xfff000e0, 0xe8d00000, PROBES_T32_TABLE_BRANCH, 0059 REGS(NOSP, 0, 0, 0, NOSPPC)), 0060 0061 /* STREX 1110 1000 0100 xxxx xxxx xxxx xxxx xxxx */ 0062 /* LDREX 1110 1000 0101 xxxx xxxx xxxx xxxx xxxx */ 0063 /* STREXB 1110 1000 1100 xxxx xxxx xxxx 0100 xxxx */ 0064 /* STREXH 1110 1000 1100 xxxx xxxx xxxx 0101 xxxx */ 0065 /* STREXD 1110 1000 1100 xxxx xxxx xxxx 0111 xxxx */ 0066 /* LDREXB 1110 1000 1101 xxxx xxxx xxxx 0100 xxxx */ 0067 /* LDREXH 1110 1000 1101 xxxx xxxx xxxx 0101 xxxx */ 0068 /* LDREXD 1110 1000 1101 xxxx xxxx xxxx 0111 xxxx */ 0069 /* And unallocated instructions... */ 0070 DECODE_END 0071 }; 0072 0073 static const union decode_item t32_table_1110_101x[] = { 0074 /* Data-processing (shifted register) */ 0075 0076 /* TST 1110 1010 0001 xxxx xxxx 1111 xxxx xxxx */ 0077 /* TEQ 1110 1010 1001 xxxx xxxx 1111 xxxx xxxx */ 0078 DECODE_EMULATEX (0xff700f00, 0xea100f00, PROBES_T32_TST, 0079 REGS(NOSPPC, 0, 0, 0, NOSPPC)), 0080 0081 /* CMN 1110 1011 0001 xxxx xxxx 1111 xxxx xxxx */ 0082 DECODE_OR (0xfff00f00, 0xeb100f00), 0083 /* CMP 1110 1011 1011 xxxx xxxx 1111 xxxx xxxx */ 0084 DECODE_EMULATEX (0xfff00f00, 0xebb00f00, PROBES_T32_TST, 0085 REGS(NOPC, 0, 0, 0, NOSPPC)), 0086 0087 /* MOV 1110 1010 010x 1111 xxxx xxxx xxxx xxxx */ 0088 /* MVN 1110 1010 011x 1111 xxxx xxxx xxxx xxxx */ 0089 DECODE_EMULATEX (0xffcf0000, 0xea4f0000, PROBES_T32_MOV, 0090 REGS(0, 0, NOSPPC, 0, NOSPPC)), 0091 0092 /* ??? 1110 1010 101x xxxx xxxx xxxx xxxx xxxx */ 0093 /* ??? 1110 1010 111x xxxx xxxx xxxx xxxx xxxx */ 0094 DECODE_REJECT (0xffa00000, 0xeaa00000), 0095 /* ??? 1110 1011 001x xxxx xxxx xxxx xxxx xxxx */ 0096 DECODE_REJECT (0xffe00000, 0xeb200000), 0097 /* ??? 1110 1011 100x xxxx xxxx xxxx xxxx xxxx */ 0098 DECODE_REJECT (0xffe00000, 0xeb800000), 0099 /* ??? 1110 1011 111x xxxx xxxx xxxx xxxx xxxx */ 0100 DECODE_REJECT (0xffe00000, 0xebe00000), 0101 0102 /* ADD/SUB SP, SP, Rm, LSL #0..3 */ 0103 /* 1110 1011 x0xx 1101 x000 1101 xx00 xxxx */ 0104 DECODE_EMULATEX (0xff4f7f30, 0xeb0d0d00, PROBES_T32_ADDSUB, 0105 REGS(SP, 0, SP, 0, NOSPPC)), 0106 0107 /* ADD/SUB SP, SP, Rm, shift */ 0108 /* 1110 1011 x0xx 1101 xxxx 1101 xxxx xxxx */ 0109 DECODE_REJECT (0xff4f0f00, 0xeb0d0d00), 0110 0111 /* ADD/SUB Rd, SP, Rm, shift */ 0112 /* 1110 1011 x0xx 1101 xxxx xxxx xxxx xxxx */ 0113 DECODE_EMULATEX (0xff4f0000, 0xeb0d0000, PROBES_T32_ADDSUB, 0114 REGS(SP, 0, NOPC, 0, NOSPPC)), 0115 0116 /* AND 1110 1010 000x xxxx xxxx xxxx xxxx xxxx */ 0117 /* BIC 1110 1010 001x xxxx xxxx xxxx xxxx xxxx */ 0118 /* ORR 1110 1010 010x xxxx xxxx xxxx xxxx xxxx */ 0119 /* ORN 1110 1010 011x xxxx xxxx xxxx xxxx xxxx */ 0120 /* EOR 1110 1010 100x xxxx xxxx xxxx xxxx xxxx */ 0121 /* PKH 1110 1010 110x xxxx xxxx xxxx xxxx xxxx */ 0122 /* ADD 1110 1011 000x xxxx xxxx xxxx xxxx xxxx */ 0123 /* ADC 1110 1011 010x xxxx xxxx xxxx xxxx xxxx */ 0124 /* SBC 1110 1011 011x xxxx xxxx xxxx xxxx xxxx */ 0125 /* SUB 1110 1011 101x xxxx xxxx xxxx xxxx xxxx */ 0126 /* RSB 1110 1011 110x xxxx xxxx xxxx xxxx xxxx */ 0127 DECODE_EMULATEX (0xfe000000, 0xea000000, PROBES_T32_LOGICAL, 0128 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), 0129 0130 DECODE_END 0131 }; 0132 0133 static const union decode_item t32_table_1111_0x0x___0[] = { 0134 /* Data-processing (modified immediate) */ 0135 0136 /* TST 1111 0x00 0001 xxxx 0xxx 1111 xxxx xxxx */ 0137 /* TEQ 1111 0x00 1001 xxxx 0xxx 1111 xxxx xxxx */ 0138 DECODE_EMULATEX (0xfb708f00, 0xf0100f00, PROBES_T32_TST, 0139 REGS(NOSPPC, 0, 0, 0, 0)), 0140 0141 /* CMN 1111 0x01 0001 xxxx 0xxx 1111 xxxx xxxx */ 0142 DECODE_OR (0xfbf08f00, 0xf1100f00), 0143 /* CMP 1111 0x01 1011 xxxx 0xxx 1111 xxxx xxxx */ 0144 DECODE_EMULATEX (0xfbf08f00, 0xf1b00f00, PROBES_T32_CMP, 0145 REGS(NOPC, 0, 0, 0, 0)), 0146 0147 /* MOV 1111 0x00 010x 1111 0xxx xxxx xxxx xxxx */ 0148 /* MVN 1111 0x00 011x 1111 0xxx xxxx xxxx xxxx */ 0149 DECODE_EMULATEX (0xfbcf8000, 0xf04f0000, PROBES_T32_MOV, 0150 REGS(0, 0, NOSPPC, 0, 0)), 0151 0152 /* ??? 1111 0x00 101x xxxx 0xxx xxxx xxxx xxxx */ 0153 DECODE_REJECT (0xfbe08000, 0xf0a00000), 0154 /* ??? 1111 0x00 110x xxxx 0xxx xxxx xxxx xxxx */ 0155 /* ??? 1111 0x00 111x xxxx 0xxx xxxx xxxx xxxx */ 0156 DECODE_REJECT (0xfbc08000, 0xf0c00000), 0157 /* ??? 1111 0x01 001x xxxx 0xxx xxxx xxxx xxxx */ 0158 DECODE_REJECT (0xfbe08000, 0xf1200000), 0159 /* ??? 1111 0x01 100x xxxx 0xxx xxxx xxxx xxxx */ 0160 DECODE_REJECT (0xfbe08000, 0xf1800000), 0161 /* ??? 1111 0x01 111x xxxx 0xxx xxxx xxxx xxxx */ 0162 DECODE_REJECT (0xfbe08000, 0xf1e00000), 0163 0164 /* ADD Rd, SP, #imm 1111 0x01 000x 1101 0xxx xxxx xxxx xxxx */ 0165 /* SUB Rd, SP, #imm 1111 0x01 101x 1101 0xxx xxxx xxxx xxxx */ 0166 DECODE_EMULATEX (0xfb4f8000, 0xf10d0000, PROBES_T32_ADDSUB, 0167 REGS(SP, 0, NOPC, 0, 0)), 0168 0169 /* AND 1111 0x00 000x xxxx 0xxx xxxx xxxx xxxx */ 0170 /* BIC 1111 0x00 001x xxxx 0xxx xxxx xxxx xxxx */ 0171 /* ORR 1111 0x00 010x xxxx 0xxx xxxx xxxx xxxx */ 0172 /* ORN 1111 0x00 011x xxxx 0xxx xxxx xxxx xxxx */ 0173 /* EOR 1111 0x00 100x xxxx 0xxx xxxx xxxx xxxx */ 0174 /* ADD 1111 0x01 000x xxxx 0xxx xxxx xxxx xxxx */ 0175 /* ADC 1111 0x01 010x xxxx 0xxx xxxx xxxx xxxx */ 0176 /* SBC 1111 0x01 011x xxxx 0xxx xxxx xxxx xxxx */ 0177 /* SUB 1111 0x01 101x xxxx 0xxx xxxx xxxx xxxx */ 0178 /* RSB 1111 0x01 110x xxxx 0xxx xxxx xxxx xxxx */ 0179 DECODE_EMULATEX (0xfa008000, 0xf0000000, PROBES_T32_LOGICAL, 0180 REGS(NOSPPC, 0, NOSPPC, 0, 0)), 0181 0182 DECODE_END 0183 }; 0184 0185 static const union decode_item t32_table_1111_0x1x___0[] = { 0186 /* Data-processing (plain binary immediate) */ 0187 0188 /* ADDW Rd, PC, #imm 1111 0x10 0000 1111 0xxx xxxx xxxx xxxx */ 0189 DECODE_OR (0xfbff8000, 0xf20f0000), 0190 /* SUBW Rd, PC, #imm 1111 0x10 1010 1111 0xxx xxxx xxxx xxxx */ 0191 DECODE_EMULATEX (0xfbff8000, 0xf2af0000, PROBES_T32_ADDWSUBW_PC, 0192 REGS(PC, 0, NOSPPC, 0, 0)), 0193 0194 /* ADDW SP, SP, #imm 1111 0x10 0000 1101 0xxx 1101 xxxx xxxx */ 0195 DECODE_OR (0xfbff8f00, 0xf20d0d00), 0196 /* SUBW SP, SP, #imm 1111 0x10 1010 1101 0xxx 1101 xxxx xxxx */ 0197 DECODE_EMULATEX (0xfbff8f00, 0xf2ad0d00, PROBES_T32_ADDWSUBW, 0198 REGS(SP, 0, SP, 0, 0)), 0199 0200 /* ADDW 1111 0x10 0000 xxxx 0xxx xxxx xxxx xxxx */ 0201 DECODE_OR (0xfbf08000, 0xf2000000), 0202 /* SUBW 1111 0x10 1010 xxxx 0xxx xxxx xxxx xxxx */ 0203 DECODE_EMULATEX (0xfbf08000, 0xf2a00000, PROBES_T32_ADDWSUBW, 0204 REGS(NOPCX, 0, NOSPPC, 0, 0)), 0205 0206 /* MOVW 1111 0x10 0100 xxxx 0xxx xxxx xxxx xxxx */ 0207 /* MOVT 1111 0x10 1100 xxxx 0xxx xxxx xxxx xxxx */ 0208 DECODE_EMULATEX (0xfb708000, 0xf2400000, PROBES_T32_MOVW, 0209 REGS(0, 0, NOSPPC, 0, 0)), 0210 0211 /* SSAT16 1111 0x11 0010 xxxx 0000 xxxx 00xx xxxx */ 0212 /* SSAT 1111 0x11 00x0 xxxx 0xxx xxxx xxxx xxxx */ 0213 /* USAT16 1111 0x11 1010 xxxx 0000 xxxx 00xx xxxx */ 0214 /* USAT 1111 0x11 10x0 xxxx 0xxx xxxx xxxx xxxx */ 0215 DECODE_EMULATEX (0xfb508000, 0xf3000000, PROBES_T32_SAT, 0216 REGS(NOSPPC, 0, NOSPPC, 0, 0)), 0217 0218 /* SFBX 1111 0x11 0100 xxxx 0xxx xxxx xxxx xxxx */ 0219 /* UFBX 1111 0x11 1100 xxxx 0xxx xxxx xxxx xxxx */ 0220 DECODE_EMULATEX (0xfb708000, 0xf3400000, PROBES_T32_BITFIELD, 0221 REGS(NOSPPC, 0, NOSPPC, 0, 0)), 0222 0223 /* BFC 1111 0x11 0110 1111 0xxx xxxx xxxx xxxx */ 0224 DECODE_EMULATEX (0xfbff8000, 0xf36f0000, PROBES_T32_BITFIELD, 0225 REGS(0, 0, NOSPPC, 0, 0)), 0226 0227 /* BFI 1111 0x11 0110 xxxx 0xxx xxxx xxxx xxxx */ 0228 DECODE_EMULATEX (0xfbf08000, 0xf3600000, PROBES_T32_BITFIELD, 0229 REGS(NOSPPCX, 0, NOSPPC, 0, 0)), 0230 0231 DECODE_END 0232 }; 0233 0234 static const union decode_item t32_table_1111_0xxx___1[] = { 0235 /* Branches and miscellaneous control */ 0236 0237 /* YIELD 1111 0011 1010 xxxx 10x0 x000 0000 0001 */ 0238 DECODE_OR (0xfff0d7ff, 0xf3a08001), 0239 /* SEV 1111 0011 1010 xxxx 10x0 x000 0000 0100 */ 0240 DECODE_EMULATE (0xfff0d7ff, 0xf3a08004, PROBES_T32_SEV), 0241 /* NOP 1111 0011 1010 xxxx 10x0 x000 0000 0000 */ 0242 /* WFE 1111 0011 1010 xxxx 10x0 x000 0000 0010 */ 0243 /* WFI 1111 0011 1010 xxxx 10x0 x000 0000 0011 */ 0244 DECODE_SIMULATE (0xfff0d7fc, 0xf3a08000, PROBES_T32_WFE), 0245 0246 /* MRS Rd, CPSR 1111 0011 1110 xxxx 10x0 xxxx xxxx xxxx */ 0247 DECODE_SIMULATEX(0xfff0d000, 0xf3e08000, PROBES_T32_MRS, 0248 REGS(0, 0, NOSPPC, 0, 0)), 0249 0250 /* 0251 * Unsupported instructions 0252 * 1111 0x11 1xxx xxxx 10x0 xxxx xxxx xxxx 0253 * 0254 * MSR 1111 0011 100x xxxx 10x0 xxxx xxxx xxxx 0255 * DBG hint 1111 0011 1010 xxxx 10x0 x000 1111 xxxx 0256 * Unallocated hints 1111 0011 1010 xxxx 10x0 x000 xxxx xxxx 0257 * CPS 1111 0011 1010 xxxx 10x0 xxxx xxxx xxxx 0258 * CLREX/DSB/DMB/ISB 1111 0011 1011 xxxx 10x0 xxxx xxxx xxxx 0259 * BXJ 1111 0011 1100 xxxx 10x0 xxxx xxxx xxxx 0260 * SUBS PC,LR,#<imm8> 1111 0011 1101 xxxx 10x0 xxxx xxxx xxxx 0261 * MRS Rd, SPSR 1111 0011 1111 xxxx 10x0 xxxx xxxx xxxx 0262 * SMC 1111 0111 1111 xxxx 1000 xxxx xxxx xxxx 0263 * UNDEFINED 1111 0111 1111 xxxx 1010 xxxx xxxx xxxx 0264 * ??? 1111 0111 1xxx xxxx 1010 xxxx xxxx xxxx 0265 */ 0266 DECODE_REJECT (0xfb80d000, 0xf3808000), 0267 0268 /* Bcc 1111 0xxx xxxx xxxx 10x0 xxxx xxxx xxxx */ 0269 DECODE_CUSTOM (0xf800d000, 0xf0008000, PROBES_T32_BRANCH_COND), 0270 0271 /* BLX 1111 0xxx xxxx xxxx 11x0 xxxx xxxx xxx0 */ 0272 DECODE_OR (0xf800d001, 0xf000c000), 0273 /* B 1111 0xxx xxxx xxxx 10x1 xxxx xxxx xxxx */ 0274 /* BL 1111 0xxx xxxx xxxx 11x1 xxxx xxxx xxxx */ 0275 DECODE_SIMULATE (0xf8009000, 0xf0009000, PROBES_T32_BRANCH), 0276 0277 DECODE_END 0278 }; 0279 0280 static const union decode_item t32_table_1111_100x_x0x1__1111[] = { 0281 /* Memory hints */ 0282 0283 /* PLD (literal) 1111 1000 x001 1111 1111 xxxx xxxx xxxx */ 0284 /* PLI (literal) 1111 1001 x001 1111 1111 xxxx xxxx xxxx */ 0285 DECODE_SIMULATE (0xfe7ff000, 0xf81ff000, PROBES_T32_PLDI), 0286 0287 /* PLD{W} (immediate) 1111 1000 10x1 xxxx 1111 xxxx xxxx xxxx */ 0288 DECODE_OR (0xffd0f000, 0xf890f000), 0289 /* PLD{W} (immediate) 1111 1000 00x1 xxxx 1111 1100 xxxx xxxx */ 0290 DECODE_OR (0xffd0ff00, 0xf810fc00), 0291 /* PLI (immediate) 1111 1001 1001 xxxx 1111 xxxx xxxx xxxx */ 0292 DECODE_OR (0xfff0f000, 0xf990f000), 0293 /* PLI (immediate) 1111 1001 0001 xxxx 1111 1100 xxxx xxxx */ 0294 DECODE_SIMULATEX(0xfff0ff00, 0xf910fc00, PROBES_T32_PLDI, 0295 REGS(NOPCX, 0, 0, 0, 0)), 0296 0297 /* PLD{W} (register) 1111 1000 00x1 xxxx 1111 0000 00xx xxxx */ 0298 DECODE_OR (0xffd0ffc0, 0xf810f000), 0299 /* PLI (register) 1111 1001 0001 xxxx 1111 0000 00xx xxxx */ 0300 DECODE_SIMULATEX(0xfff0ffc0, 0xf910f000, PROBES_T32_PLDI, 0301 REGS(NOPCX, 0, 0, 0, NOSPPC)), 0302 0303 /* Other unallocated instructions... */ 0304 DECODE_END 0305 }; 0306 0307 static const union decode_item t32_table_1111_100x[] = { 0308 /* Store/Load single data item */ 0309 0310 /* ??? 1111 100x x11x xxxx xxxx xxxx xxxx xxxx */ 0311 DECODE_REJECT (0xfe600000, 0xf8600000), 0312 0313 /* ??? 1111 1001 0101 xxxx xxxx xxxx xxxx xxxx */ 0314 DECODE_REJECT (0xfff00000, 0xf9500000), 0315 0316 /* ??? 1111 100x 0xxx xxxx xxxx 10x0 xxxx xxxx */ 0317 DECODE_REJECT (0xfe800d00, 0xf8000800), 0318 0319 /* STRBT 1111 1000 0000 xxxx xxxx 1110 xxxx xxxx */ 0320 /* STRHT 1111 1000 0010 xxxx xxxx 1110 xxxx xxxx */ 0321 /* STRT 1111 1000 0100 xxxx xxxx 1110 xxxx xxxx */ 0322 /* LDRBT 1111 1000 0001 xxxx xxxx 1110 xxxx xxxx */ 0323 /* LDRSBT 1111 1001 0001 xxxx xxxx 1110 xxxx xxxx */ 0324 /* LDRHT 1111 1000 0011 xxxx xxxx 1110 xxxx xxxx */ 0325 /* LDRSHT 1111 1001 0011 xxxx xxxx 1110 xxxx xxxx */ 0326 /* LDRT 1111 1000 0101 xxxx xxxx 1110 xxxx xxxx */ 0327 DECODE_REJECT (0xfe800f00, 0xf8000e00), 0328 0329 /* STR{,B,H} Rn,[PC...] 1111 1000 xxx0 1111 xxxx xxxx xxxx xxxx */ 0330 DECODE_REJECT (0xff1f0000, 0xf80f0000), 0331 0332 /* STR{,B,H} PC,[Rn...] 1111 1000 xxx0 xxxx 1111 xxxx xxxx xxxx */ 0333 DECODE_REJECT (0xff10f000, 0xf800f000), 0334 0335 /* LDR (literal) 1111 1000 x101 1111 xxxx xxxx xxxx xxxx */ 0336 DECODE_SIMULATEX(0xff7f0000, 0xf85f0000, PROBES_T32_LDR_LIT, 0337 REGS(PC, ANY, 0, 0, 0)), 0338 0339 /* STR (immediate) 1111 1000 0100 xxxx xxxx 1xxx xxxx xxxx */ 0340 /* LDR (immediate) 1111 1000 0101 xxxx xxxx 1xxx xxxx xxxx */ 0341 DECODE_OR (0xffe00800, 0xf8400800), 0342 /* STR (immediate) 1111 1000 1100 xxxx xxxx xxxx xxxx xxxx */ 0343 /* LDR (immediate) 1111 1000 1101 xxxx xxxx xxxx xxxx xxxx */ 0344 DECODE_EMULATEX (0xffe00000, 0xf8c00000, PROBES_T32_LDRSTR, 0345 REGS(NOPCX, ANY, 0, 0, 0)), 0346 0347 /* STR (register) 1111 1000 0100 xxxx xxxx 0000 00xx xxxx */ 0348 /* LDR (register) 1111 1000 0101 xxxx xxxx 0000 00xx xxxx */ 0349 DECODE_EMULATEX (0xffe00fc0, 0xf8400000, PROBES_T32_LDRSTR, 0350 REGS(NOPCX, ANY, 0, 0, NOSPPC)), 0351 0352 /* LDRB (literal) 1111 1000 x001 1111 xxxx xxxx xxxx xxxx */ 0353 /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */ 0354 /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */ 0355 /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */ 0356 DECODE_SIMULATEX(0xfe5f0000, 0xf81f0000, PROBES_T32_LDR_LIT, 0357 REGS(PC, NOSPPCX, 0, 0, 0)), 0358 0359 /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */ 0360 /* STRH (immediate) 1111 1000 0010 xxxx xxxx 1xxx xxxx xxxx */ 0361 /* LDRB (immediate) 1111 1000 0001 xxxx xxxx 1xxx xxxx xxxx */ 0362 /* LDRSB (immediate) 1111 1001 0001 xxxx xxxx 1xxx xxxx xxxx */ 0363 /* LDRH (immediate) 1111 1000 0011 xxxx xxxx 1xxx xxxx xxxx */ 0364 /* LDRSH (immediate) 1111 1001 0011 xxxx xxxx 1xxx xxxx xxxx */ 0365 DECODE_OR (0xfec00800, 0xf8000800), 0366 /* STRB (immediate) 1111 1000 1000 xxxx xxxx xxxx xxxx xxxx */ 0367 /* STRH (immediate) 1111 1000 1010 xxxx xxxx xxxx xxxx xxxx */ 0368 /* LDRB (immediate) 1111 1000 1001 xxxx xxxx xxxx xxxx xxxx */ 0369 /* LDRSB (immediate) 1111 1001 1001 xxxx xxxx xxxx xxxx xxxx */ 0370 /* LDRH (immediate) 1111 1000 1011 xxxx xxxx xxxx xxxx xxxx */ 0371 /* LDRSH (immediate) 1111 1001 1011 xxxx xxxx xxxx xxxx xxxx */ 0372 DECODE_EMULATEX (0xfec00000, 0xf8800000, PROBES_T32_LDRSTR, 0373 REGS(NOPCX, NOSPPCX, 0, 0, 0)), 0374 0375 /* STRB (register) 1111 1000 0000 xxxx xxxx 0000 00xx xxxx */ 0376 /* STRH (register) 1111 1000 0010 xxxx xxxx 0000 00xx xxxx */ 0377 /* LDRB (register) 1111 1000 0001 xxxx xxxx 0000 00xx xxxx */ 0378 /* LDRSB (register) 1111 1001 0001 xxxx xxxx 0000 00xx xxxx */ 0379 /* LDRH (register) 1111 1000 0011 xxxx xxxx 0000 00xx xxxx */ 0380 /* LDRSH (register) 1111 1001 0011 xxxx xxxx 0000 00xx xxxx */ 0381 DECODE_EMULATEX (0xfe800fc0, 0xf8000000, PROBES_T32_LDRSTR, 0382 REGS(NOPCX, NOSPPCX, 0, 0, NOSPPC)), 0383 0384 /* Other unallocated instructions... */ 0385 DECODE_END 0386 }; 0387 0388 static const union decode_item t32_table_1111_1010___1111[] = { 0389 /* Data-processing (register) */ 0390 0391 /* ??? 1111 1010 011x xxxx 1111 xxxx 1xxx xxxx */ 0392 DECODE_REJECT (0xffe0f080, 0xfa60f080), 0393 0394 /* SXTH 1111 1010 0000 1111 1111 xxxx 1xxx xxxx */ 0395 /* UXTH 1111 1010 0001 1111 1111 xxxx 1xxx xxxx */ 0396 /* SXTB16 1111 1010 0010 1111 1111 xxxx 1xxx xxxx */ 0397 /* UXTB16 1111 1010 0011 1111 1111 xxxx 1xxx xxxx */ 0398 /* SXTB 1111 1010 0100 1111 1111 xxxx 1xxx xxxx */ 0399 /* UXTB 1111 1010 0101 1111 1111 xxxx 1xxx xxxx */ 0400 DECODE_EMULATEX (0xff8ff080, 0xfa0ff080, PROBES_T32_SIGN_EXTEND, 0401 REGS(0, 0, NOSPPC, 0, NOSPPC)), 0402 0403 0404 /* ??? 1111 1010 1xxx xxxx 1111 xxxx 0x11 xxxx */ 0405 DECODE_REJECT (0xff80f0b0, 0xfa80f030), 0406 /* ??? 1111 1010 1x11 xxxx 1111 xxxx 0xxx xxxx */ 0407 DECODE_REJECT (0xffb0f080, 0xfab0f000), 0408 0409 /* SADD16 1111 1010 1001 xxxx 1111 xxxx 0000 xxxx */ 0410 /* SASX 1111 1010 1010 xxxx 1111 xxxx 0000 xxxx */ 0411 /* SSAX 1111 1010 1110 xxxx 1111 xxxx 0000 xxxx */ 0412 /* SSUB16 1111 1010 1101 xxxx 1111 xxxx 0000 xxxx */ 0413 /* SADD8 1111 1010 1000 xxxx 1111 xxxx 0000 xxxx */ 0414 /* SSUB8 1111 1010 1100 xxxx 1111 xxxx 0000 xxxx */ 0415 0416 /* QADD16 1111 1010 1001 xxxx 1111 xxxx 0001 xxxx */ 0417 /* QASX 1111 1010 1010 xxxx 1111 xxxx 0001 xxxx */ 0418 /* QSAX 1111 1010 1110 xxxx 1111 xxxx 0001 xxxx */ 0419 /* QSUB16 1111 1010 1101 xxxx 1111 xxxx 0001 xxxx */ 0420 /* QADD8 1111 1010 1000 xxxx 1111 xxxx 0001 xxxx */ 0421 /* QSUB8 1111 1010 1100 xxxx 1111 xxxx 0001 xxxx */ 0422 0423 /* SHADD16 1111 1010 1001 xxxx 1111 xxxx 0010 xxxx */ 0424 /* SHASX 1111 1010 1010 xxxx 1111 xxxx 0010 xxxx */ 0425 /* SHSAX 1111 1010 1110 xxxx 1111 xxxx 0010 xxxx */ 0426 /* SHSUB16 1111 1010 1101 xxxx 1111 xxxx 0010 xxxx */ 0427 /* SHADD8 1111 1010 1000 xxxx 1111 xxxx 0010 xxxx */ 0428 /* SHSUB8 1111 1010 1100 xxxx 1111 xxxx 0010 xxxx */ 0429 0430 /* UADD16 1111 1010 1001 xxxx 1111 xxxx 0100 xxxx */ 0431 /* UASX 1111 1010 1010 xxxx 1111 xxxx 0100 xxxx */ 0432 /* USAX 1111 1010 1110 xxxx 1111 xxxx 0100 xxxx */ 0433 /* USUB16 1111 1010 1101 xxxx 1111 xxxx 0100 xxxx */ 0434 /* UADD8 1111 1010 1000 xxxx 1111 xxxx 0100 xxxx */ 0435 /* USUB8 1111 1010 1100 xxxx 1111 xxxx 0100 xxxx */ 0436 0437 /* UQADD16 1111 1010 1001 xxxx 1111 xxxx 0101 xxxx */ 0438 /* UQASX 1111 1010 1010 xxxx 1111 xxxx 0101 xxxx */ 0439 /* UQSAX 1111 1010 1110 xxxx 1111 xxxx 0101 xxxx */ 0440 /* UQSUB16 1111 1010 1101 xxxx 1111 xxxx 0101 xxxx */ 0441 /* UQADD8 1111 1010 1000 xxxx 1111 xxxx 0101 xxxx */ 0442 /* UQSUB8 1111 1010 1100 xxxx 1111 xxxx 0101 xxxx */ 0443 0444 /* UHADD16 1111 1010 1001 xxxx 1111 xxxx 0110 xxxx */ 0445 /* UHASX 1111 1010 1010 xxxx 1111 xxxx 0110 xxxx */ 0446 /* UHSAX 1111 1010 1110 xxxx 1111 xxxx 0110 xxxx */ 0447 /* UHSUB16 1111 1010 1101 xxxx 1111 xxxx 0110 xxxx */ 0448 /* UHADD8 1111 1010 1000 xxxx 1111 xxxx 0110 xxxx */ 0449 /* UHSUB8 1111 1010 1100 xxxx 1111 xxxx 0110 xxxx */ 0450 DECODE_OR (0xff80f080, 0xfa80f000), 0451 0452 /* SXTAH 1111 1010 0000 xxxx 1111 xxxx 1xxx xxxx */ 0453 /* UXTAH 1111 1010 0001 xxxx 1111 xxxx 1xxx xxxx */ 0454 /* SXTAB16 1111 1010 0010 xxxx 1111 xxxx 1xxx xxxx */ 0455 /* UXTAB16 1111 1010 0011 xxxx 1111 xxxx 1xxx xxxx */ 0456 /* SXTAB 1111 1010 0100 xxxx 1111 xxxx 1xxx xxxx */ 0457 /* UXTAB 1111 1010 0101 xxxx 1111 xxxx 1xxx xxxx */ 0458 DECODE_OR (0xff80f080, 0xfa00f080), 0459 0460 /* QADD 1111 1010 1000 xxxx 1111 xxxx 1000 xxxx */ 0461 /* QDADD 1111 1010 1000 xxxx 1111 xxxx 1001 xxxx */ 0462 /* QSUB 1111 1010 1000 xxxx 1111 xxxx 1010 xxxx */ 0463 /* QDSUB 1111 1010 1000 xxxx 1111 xxxx 1011 xxxx */ 0464 DECODE_OR (0xfff0f0c0, 0xfa80f080), 0465 0466 /* SEL 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */ 0467 DECODE_OR (0xfff0f0f0, 0xfaa0f080), 0468 0469 /* LSL 1111 1010 000x xxxx 1111 xxxx 0000 xxxx */ 0470 /* LSR 1111 1010 001x xxxx 1111 xxxx 0000 xxxx */ 0471 /* ASR 1111 1010 010x xxxx 1111 xxxx 0000 xxxx */ 0472 /* ROR 1111 1010 011x xxxx 1111 xxxx 0000 xxxx */ 0473 DECODE_EMULATEX (0xff80f0f0, 0xfa00f000, PROBES_T32_MEDIA, 0474 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), 0475 0476 /* CLZ 1111 1010 1010 xxxx 1111 xxxx 1000 xxxx */ 0477 DECODE_OR (0xfff0f0f0, 0xfab0f080), 0478 0479 /* REV 1111 1010 1001 xxxx 1111 xxxx 1000 xxxx */ 0480 /* REV16 1111 1010 1001 xxxx 1111 xxxx 1001 xxxx */ 0481 /* RBIT 1111 1010 1001 xxxx 1111 xxxx 1010 xxxx */ 0482 /* REVSH 1111 1010 1001 xxxx 1111 xxxx 1011 xxxx */ 0483 DECODE_EMULATEX (0xfff0f0c0, 0xfa90f080, PROBES_T32_REVERSE, 0484 REGS(NOSPPC, 0, NOSPPC, 0, SAMEAS16)), 0485 0486 /* Other unallocated instructions... */ 0487 DECODE_END 0488 }; 0489 0490 static const union decode_item t32_table_1111_1011_0[] = { 0491 /* Multiply, multiply accumulate, and absolute difference */ 0492 0493 /* ??? 1111 1011 0000 xxxx 1111 xxxx 0001 xxxx */ 0494 DECODE_REJECT (0xfff0f0f0, 0xfb00f010), 0495 /* ??? 1111 1011 0111 xxxx 1111 xxxx 0001 xxxx */ 0496 DECODE_REJECT (0xfff0f0f0, 0xfb70f010), 0497 0498 /* SMULxy 1111 1011 0001 xxxx 1111 xxxx 00xx xxxx */ 0499 DECODE_OR (0xfff0f0c0, 0xfb10f000), 0500 /* MUL 1111 1011 0000 xxxx 1111 xxxx 0000 xxxx */ 0501 /* SMUAD{X} 1111 1011 0010 xxxx 1111 xxxx 000x xxxx */ 0502 /* SMULWy 1111 1011 0011 xxxx 1111 xxxx 000x xxxx */ 0503 /* SMUSD{X} 1111 1011 0100 xxxx 1111 xxxx 000x xxxx */ 0504 /* SMMUL{R} 1111 1011 0101 xxxx 1111 xxxx 000x xxxx */ 0505 /* USAD8 1111 1011 0111 xxxx 1111 xxxx 0000 xxxx */ 0506 DECODE_EMULATEX (0xff80f0e0, 0xfb00f000, PROBES_T32_MUL_ADD, 0507 REGS(NOSPPC, 0, NOSPPC, 0, NOSPPC)), 0508 0509 /* ??? 1111 1011 0111 xxxx xxxx xxxx 0001 xxxx */ 0510 DECODE_REJECT (0xfff000f0, 0xfb700010), 0511 0512 /* SMLAxy 1111 1011 0001 xxxx xxxx xxxx 00xx xxxx */ 0513 DECODE_OR (0xfff000c0, 0xfb100000), 0514 /* MLA 1111 1011 0000 xxxx xxxx xxxx 0000 xxxx */ 0515 /* MLS 1111 1011 0000 xxxx xxxx xxxx 0001 xxxx */ 0516 /* SMLAD{X} 1111 1011 0010 xxxx xxxx xxxx 000x xxxx */ 0517 /* SMLAWy 1111 1011 0011 xxxx xxxx xxxx 000x xxxx */ 0518 /* SMLSD{X} 1111 1011 0100 xxxx xxxx xxxx 000x xxxx */ 0519 /* SMMLA{R} 1111 1011 0101 xxxx xxxx xxxx 000x xxxx */ 0520 /* SMMLS{R} 1111 1011 0110 xxxx xxxx xxxx 000x xxxx */ 0521 /* USADA8 1111 1011 0111 xxxx xxxx xxxx 0000 xxxx */ 0522 DECODE_EMULATEX (0xff8000c0, 0xfb000000, PROBES_T32_MUL_ADD2, 0523 REGS(NOSPPC, NOSPPCX, NOSPPC, 0, NOSPPC)), 0524 0525 /* Other unallocated instructions... */ 0526 DECODE_END 0527 }; 0528 0529 static const union decode_item t32_table_1111_1011_1[] = { 0530 /* Long multiply, long multiply accumulate, and divide */ 0531 0532 /* UMAAL 1111 1011 1110 xxxx xxxx xxxx 0110 xxxx */ 0533 DECODE_OR (0xfff000f0, 0xfbe00060), 0534 /* SMLALxy 1111 1011 1100 xxxx xxxx xxxx 10xx xxxx */ 0535 DECODE_OR (0xfff000c0, 0xfbc00080), 0536 /* SMLALD{X} 1111 1011 1100 xxxx xxxx xxxx 110x xxxx */ 0537 /* SMLSLD{X} 1111 1011 1101 xxxx xxxx xxxx 110x xxxx */ 0538 DECODE_OR (0xffe000e0, 0xfbc000c0), 0539 /* SMULL 1111 1011 1000 xxxx xxxx xxxx 0000 xxxx */ 0540 /* UMULL 1111 1011 1010 xxxx xxxx xxxx 0000 xxxx */ 0541 /* SMLAL 1111 1011 1100 xxxx xxxx xxxx 0000 xxxx */ 0542 /* UMLAL 1111 1011 1110 xxxx xxxx xxxx 0000 xxxx */ 0543 DECODE_EMULATEX (0xff9000f0, 0xfb800000, PROBES_T32_MUL_ADD_LONG, 0544 REGS(NOSPPC, NOSPPC, NOSPPC, 0, NOSPPC)), 0545 0546 /* SDIV 1111 1011 1001 xxxx xxxx xxxx 1111 xxxx */ 0547 /* UDIV 1111 1011 1011 xxxx xxxx xxxx 1111 xxxx */ 0548 /* Other unallocated instructions... */ 0549 DECODE_END 0550 }; 0551 0552 const union decode_item probes_decode_thumb32_table[] = { 0553 0554 /* 0555 * Load/store multiple instructions 0556 * 1110 100x x0xx xxxx xxxx xxxx xxxx xxxx 0557 */ 0558 DECODE_TABLE (0xfe400000, 0xe8000000, t32_table_1110_100x_x0xx), 0559 0560 /* 0561 * Load/store dual, load/store exclusive, table branch 0562 * 1110 100x x1xx xxxx xxxx xxxx xxxx xxxx 0563 */ 0564 DECODE_TABLE (0xfe400000, 0xe8400000, t32_table_1110_100x_x1xx), 0565 0566 /* 0567 * Data-processing (shifted register) 0568 * 1110 101x xxxx xxxx xxxx xxxx xxxx xxxx 0569 */ 0570 DECODE_TABLE (0xfe000000, 0xea000000, t32_table_1110_101x), 0571 0572 /* 0573 * Coprocessor instructions 0574 * 1110 11xx xxxx xxxx xxxx xxxx xxxx xxxx 0575 */ 0576 DECODE_REJECT (0xfc000000, 0xec000000), 0577 0578 /* 0579 * Data-processing (modified immediate) 0580 * 1111 0x0x xxxx xxxx 0xxx xxxx xxxx xxxx 0581 */ 0582 DECODE_TABLE (0xfa008000, 0xf0000000, t32_table_1111_0x0x___0), 0583 0584 /* 0585 * Data-processing (plain binary immediate) 0586 * 1111 0x1x xxxx xxxx 0xxx xxxx xxxx xxxx 0587 */ 0588 DECODE_TABLE (0xfa008000, 0xf2000000, t32_table_1111_0x1x___0), 0589 0590 /* 0591 * Branches and miscellaneous control 0592 * 1111 0xxx xxxx xxxx 1xxx xxxx xxxx xxxx 0593 */ 0594 DECODE_TABLE (0xf8008000, 0xf0008000, t32_table_1111_0xxx___1), 0595 0596 /* 0597 * Advanced SIMD element or structure load/store instructions 0598 * 1111 1001 xxx0 xxxx xxxx xxxx xxxx xxxx 0599 */ 0600 DECODE_REJECT (0xff100000, 0xf9000000), 0601 0602 /* 0603 * Memory hints 0604 * 1111 100x x0x1 xxxx 1111 xxxx xxxx xxxx 0605 */ 0606 DECODE_TABLE (0xfe50f000, 0xf810f000, t32_table_1111_100x_x0x1__1111), 0607 0608 /* 0609 * Store single data item 0610 * 1111 1000 xxx0 xxxx xxxx xxxx xxxx xxxx 0611 * Load single data items 0612 * 1111 100x xxx1 xxxx xxxx xxxx xxxx xxxx 0613 */ 0614 DECODE_TABLE (0xfe000000, 0xf8000000, t32_table_1111_100x), 0615 0616 /* 0617 * Data-processing (register) 0618 * 1111 1010 xxxx xxxx 1111 xxxx xxxx xxxx 0619 */ 0620 DECODE_TABLE (0xff00f000, 0xfa00f000, t32_table_1111_1010___1111), 0621 0622 /* 0623 * Multiply, multiply accumulate, and absolute difference 0624 * 1111 1011 0xxx xxxx xxxx xxxx xxxx xxxx 0625 */ 0626 DECODE_TABLE (0xff800000, 0xfb000000, t32_table_1111_1011_0), 0627 0628 /* 0629 * Long multiply, long multiply accumulate, and divide 0630 * 1111 1011 1xxx xxxx xxxx xxxx xxxx xxxx 0631 */ 0632 DECODE_TABLE (0xff800000, 0xfb800000, t32_table_1111_1011_1), 0633 0634 /* 0635 * Coprocessor instructions 0636 * 1111 11xx xxxx xxxx xxxx xxxx xxxx xxxx 0637 */ 0638 DECODE_END 0639 }; 0640 #ifdef CONFIG_ARM_KPROBES_TEST_MODULE 0641 EXPORT_SYMBOL_GPL(probes_decode_thumb32_table); 0642 #endif 0643 0644 static const union decode_item t16_table_1011[] = { 0645 /* Miscellaneous 16-bit instructions */ 0646 0647 /* ADD (SP plus immediate) 1011 0000 0xxx xxxx */ 0648 /* SUB (SP minus immediate) 1011 0000 1xxx xxxx */ 0649 DECODE_SIMULATE (0xff00, 0xb000, PROBES_T16_ADD_SP), 0650 0651 /* CBZ 1011 00x1 xxxx xxxx */ 0652 /* CBNZ 1011 10x1 xxxx xxxx */ 0653 DECODE_SIMULATE (0xf500, 0xb100, PROBES_T16_CBZ), 0654 0655 /* SXTH 1011 0010 00xx xxxx */ 0656 /* SXTB 1011 0010 01xx xxxx */ 0657 /* UXTH 1011 0010 10xx xxxx */ 0658 /* UXTB 1011 0010 11xx xxxx */ 0659 /* REV 1011 1010 00xx xxxx */ 0660 /* REV16 1011 1010 01xx xxxx */ 0661 /* ??? 1011 1010 10xx xxxx */ 0662 /* REVSH 1011 1010 11xx xxxx */ 0663 DECODE_REJECT (0xffc0, 0xba80), 0664 DECODE_EMULATE (0xf500, 0xb000, PROBES_T16_SIGN_EXTEND), 0665 0666 /* PUSH 1011 010x xxxx xxxx */ 0667 DECODE_CUSTOM (0xfe00, 0xb400, PROBES_T16_PUSH), 0668 /* POP 1011 110x xxxx xxxx */ 0669 DECODE_CUSTOM (0xfe00, 0xbc00, PROBES_T16_POP), 0670 0671 /* 0672 * If-Then, and hints 0673 * 1011 1111 xxxx xxxx 0674 */ 0675 0676 /* YIELD 1011 1111 0001 0000 */ 0677 DECODE_OR (0xffff, 0xbf10), 0678 /* SEV 1011 1111 0100 0000 */ 0679 DECODE_EMULATE (0xffff, 0xbf40, PROBES_T16_SEV), 0680 /* NOP 1011 1111 0000 0000 */ 0681 /* WFE 1011 1111 0010 0000 */ 0682 /* WFI 1011 1111 0011 0000 */ 0683 DECODE_SIMULATE (0xffcf, 0xbf00, PROBES_T16_WFE), 0684 /* Unassigned hints 1011 1111 xxxx 0000 */ 0685 DECODE_REJECT (0xff0f, 0xbf00), 0686 /* IT 1011 1111 xxxx xxxx */ 0687 DECODE_CUSTOM (0xff00, 0xbf00, PROBES_T16_IT), 0688 0689 /* SETEND 1011 0110 010x xxxx */ 0690 /* CPS 1011 0110 011x xxxx */ 0691 /* BKPT 1011 1110 xxxx xxxx */ 0692 /* And unallocated instructions... */ 0693 DECODE_END 0694 }; 0695 0696 const union decode_item probes_decode_thumb16_table[] = { 0697 0698 /* 0699 * Shift (immediate), add, subtract, move, and compare 0700 * 00xx xxxx xxxx xxxx 0701 */ 0702 0703 /* CMP (immediate) 0010 1xxx xxxx xxxx */ 0704 DECODE_EMULATE (0xf800, 0x2800, PROBES_T16_CMP), 0705 0706 /* ADD (register) 0001 100x xxxx xxxx */ 0707 /* SUB (register) 0001 101x xxxx xxxx */ 0708 /* LSL (immediate) 0000 0xxx xxxx xxxx */ 0709 /* LSR (immediate) 0000 1xxx xxxx xxxx */ 0710 /* ASR (immediate) 0001 0xxx xxxx xxxx */ 0711 /* ADD (immediate, Thumb) 0001 110x xxxx xxxx */ 0712 /* SUB (immediate, Thumb) 0001 111x xxxx xxxx */ 0713 /* MOV (immediate) 0010 0xxx xxxx xxxx */ 0714 /* ADD (immediate, Thumb) 0011 0xxx xxxx xxxx */ 0715 /* SUB (immediate, Thumb) 0011 1xxx xxxx xxxx */ 0716 DECODE_EMULATE (0xc000, 0x0000, PROBES_T16_ADDSUB), 0717 0718 /* 0719 * 16-bit Thumb data-processing instructions 0720 * 0100 00xx xxxx xxxx 0721 */ 0722 0723 /* TST (register) 0100 0010 00xx xxxx */ 0724 DECODE_EMULATE (0xffc0, 0x4200, PROBES_T16_CMP), 0725 /* CMP (register) 0100 0010 10xx xxxx */ 0726 /* CMN (register) 0100 0010 11xx xxxx */ 0727 DECODE_EMULATE (0xff80, 0x4280, PROBES_T16_CMP), 0728 /* AND (register) 0100 0000 00xx xxxx */ 0729 /* EOR (register) 0100 0000 01xx xxxx */ 0730 /* LSL (register) 0100 0000 10xx xxxx */ 0731 /* LSR (register) 0100 0000 11xx xxxx */ 0732 /* ASR (register) 0100 0001 00xx xxxx */ 0733 /* ADC (register) 0100 0001 01xx xxxx */ 0734 /* SBC (register) 0100 0001 10xx xxxx */ 0735 /* ROR (register) 0100 0001 11xx xxxx */ 0736 /* RSB (immediate) 0100 0010 01xx xxxx */ 0737 /* ORR (register) 0100 0011 00xx xxxx */ 0738 /* MUL 0100 0011 00xx xxxx */ 0739 /* BIC (register) 0100 0011 10xx xxxx */ 0740 /* MVN (register) 0100 0011 10xx xxxx */ 0741 DECODE_EMULATE (0xfc00, 0x4000, PROBES_T16_LOGICAL), 0742 0743 /* 0744 * Special data instructions and branch and exchange 0745 * 0100 01xx xxxx xxxx 0746 */ 0747 0748 /* BLX pc 0100 0111 1111 1xxx */ 0749 DECODE_REJECT (0xfff8, 0x47f8), 0750 0751 /* BX (register) 0100 0111 0xxx xxxx */ 0752 /* BLX (register) 0100 0111 1xxx xxxx */ 0753 DECODE_SIMULATE (0xff00, 0x4700, PROBES_T16_BLX), 0754 0755 /* ADD pc, pc 0100 0100 1111 1111 */ 0756 DECODE_REJECT (0xffff, 0x44ff), 0757 0758 /* ADD (register) 0100 0100 xxxx xxxx */ 0759 /* CMP (register) 0100 0101 xxxx xxxx */ 0760 /* MOV (register) 0100 0110 xxxx xxxx */ 0761 DECODE_CUSTOM (0xfc00, 0x4400, PROBES_T16_HIREGOPS), 0762 0763 /* 0764 * Load from Literal Pool 0765 * LDR (literal) 0100 1xxx xxxx xxxx 0766 */ 0767 DECODE_SIMULATE (0xf800, 0x4800, PROBES_T16_LDR_LIT), 0768 0769 /* 0770 * 16-bit Thumb Load/store instructions 0771 * 0101 xxxx xxxx xxxx 0772 * 011x xxxx xxxx xxxx 0773 * 100x xxxx xxxx xxxx 0774 */ 0775 0776 /* STR (register) 0101 000x xxxx xxxx */ 0777 /* STRH (register) 0101 001x xxxx xxxx */ 0778 /* STRB (register) 0101 010x xxxx xxxx */ 0779 /* LDRSB (register) 0101 011x xxxx xxxx */ 0780 /* LDR (register) 0101 100x xxxx xxxx */ 0781 /* LDRH (register) 0101 101x xxxx xxxx */ 0782 /* LDRB (register) 0101 110x xxxx xxxx */ 0783 /* LDRSH (register) 0101 111x xxxx xxxx */ 0784 /* STR (immediate, Thumb) 0110 0xxx xxxx xxxx */ 0785 /* LDR (immediate, Thumb) 0110 1xxx xxxx xxxx */ 0786 /* STRB (immediate, Thumb) 0111 0xxx xxxx xxxx */ 0787 /* LDRB (immediate, Thumb) 0111 1xxx xxxx xxxx */ 0788 DECODE_EMULATE (0xc000, 0x4000, PROBES_T16_LDRHSTRH), 0789 /* STRH (immediate, Thumb) 1000 0xxx xxxx xxxx */ 0790 /* LDRH (immediate, Thumb) 1000 1xxx xxxx xxxx */ 0791 DECODE_EMULATE (0xf000, 0x8000, PROBES_T16_LDRHSTRH), 0792 /* STR (immediate, Thumb) 1001 0xxx xxxx xxxx */ 0793 /* LDR (immediate, Thumb) 1001 1xxx xxxx xxxx */ 0794 DECODE_SIMULATE (0xf000, 0x9000, PROBES_T16_LDRSTR), 0795 0796 /* 0797 * Generate PC-/SP-relative address 0798 * ADR (literal) 1010 0xxx xxxx xxxx 0799 * ADD (SP plus immediate) 1010 1xxx xxxx xxxx 0800 */ 0801 DECODE_SIMULATE (0xf000, 0xa000, PROBES_T16_ADR), 0802 0803 /* 0804 * Miscellaneous 16-bit instructions 0805 * 1011 xxxx xxxx xxxx 0806 */ 0807 DECODE_TABLE (0xf000, 0xb000, t16_table_1011), 0808 0809 /* STM 1100 0xxx xxxx xxxx */ 0810 /* LDM 1100 1xxx xxxx xxxx */ 0811 DECODE_EMULATE (0xf000, 0xc000, PROBES_T16_LDMSTM), 0812 0813 /* 0814 * Conditional branch, and Supervisor Call 0815 */ 0816 0817 /* Permanently UNDEFINED 1101 1110 xxxx xxxx */ 0818 /* SVC 1101 1111 xxxx xxxx */ 0819 DECODE_REJECT (0xfe00, 0xde00), 0820 0821 /* Conditional branch 1101 xxxx xxxx xxxx */ 0822 DECODE_CUSTOM (0xf000, 0xd000, PROBES_T16_BRANCH_COND), 0823 0824 /* 0825 * Unconditional branch 0826 * B 1110 0xxx xxxx xxxx 0827 */ 0828 DECODE_SIMULATE (0xf800, 0xe000, PROBES_T16_BRANCH), 0829 0830 DECODE_END 0831 }; 0832 #ifdef CONFIG_ARM_KPROBES_TEST_MODULE 0833 EXPORT_SYMBOL_GPL(probes_decode_thumb16_table); 0834 #endif 0835 0836 static unsigned long __kprobes thumb_check_cc(unsigned long cpsr) 0837 { 0838 if (unlikely(in_it_block(cpsr))) 0839 return probes_condition_checks[current_cond(cpsr)](cpsr); 0840 return true; 0841 } 0842 0843 static void __kprobes thumb16_singlestep(probes_opcode_t opcode, 0844 struct arch_probes_insn *asi, 0845 struct pt_regs *regs) 0846 { 0847 regs->ARM_pc += 2; 0848 asi->insn_handler(opcode, asi, regs); 0849 regs->ARM_cpsr = it_advance(regs->ARM_cpsr); 0850 } 0851 0852 static void __kprobes thumb32_singlestep(probes_opcode_t opcode, 0853 struct arch_probes_insn *asi, 0854 struct pt_regs *regs) 0855 { 0856 regs->ARM_pc += 4; 0857 asi->insn_handler(opcode, asi, regs); 0858 regs->ARM_cpsr = it_advance(regs->ARM_cpsr); 0859 } 0860 0861 enum probes_insn __kprobes 0862 thumb16_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi, 0863 bool emulate, const union decode_action *actions, 0864 const struct decode_checker *checkers[]) 0865 { 0866 asi->insn_singlestep = thumb16_singlestep; 0867 asi->insn_check_cc = thumb_check_cc; 0868 return probes_decode_insn(insn, asi, probes_decode_thumb16_table, true, 0869 emulate, actions, checkers); 0870 } 0871 0872 enum probes_insn __kprobes 0873 thumb32_probes_decode_insn(probes_opcode_t insn, struct arch_probes_insn *asi, 0874 bool emulate, const union decode_action *actions, 0875 const struct decode_checker *checkers[]) 0876 { 0877 asi->insn_singlestep = thumb32_singlestep; 0878 asi->insn_check_cc = thumb_check_cc; 0879 return probes_decode_insn(insn, asi, probes_decode_thumb32_table, true, 0880 emulate, actions, checkers); 0881 }
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