arm/plat-orion/irq.c

0001 /*
0002  * arch/arm/plat-orion/irq.c
0003  *
0004  * Marvell Orion SoC IRQ handling.
0005  *
0006  * This file is licensed under the terms of the GNU General Public
0007  * License version 2.  This program is licensed "as is" without any
0008  * warranty of any kind, whether express or implied.
0009  */
0010
0011 #include <linux/kernel.h>
0012 #include <linux/init.h>
0013 #include <linux/irq.h>
0014 #include <linux/irqdomain.h>
0015 #include <linux/io.h>
0016 #include <linux/of_address.h>
0017 #include <linux/of_irq.h>
0018 #include <asm/exception.h>
0019 #include <plat/irq.h>
0020 #include <plat/orion-gpio.h>
0021
0022 void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
0023 {
0024     struct irq_chip_generic *gc;
0025     struct irq_chip_type *ct;
0026
0027     /*
0028      * Mask all interrupts initially.
0029      */
0030     writel(0, maskaddr);
0031
0032     gc = irq_alloc_generic_chip("orion_irq", 1, irq_start, maskaddr,
0033                     handle_level_irq);
0034     ct = gc->chip_types;
0035     ct->chip.irq_mask = irq_gc_mask_clr_bit;
0036     ct->chip.irq_unmask = irq_gc_mask_set_bit;
0037     irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
0038                    IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
0039 }