arm/mm/abort-ev6.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #include <linux/linkage.h>
0003 #include <asm/assembler.h>
0004 #include "abort-macro.S"
0005 /*
0006  * Function: v6_early_abort
0007  *
0008  * Params  : r2 = pt_regs
0009  *     : r4 = aborted context pc
0010  *     : r5 = aborted context psr
0011  *
0012  * Returns : r4 - r11, r13 preserved
0013  *
0014  * Purpose : obtain information about current aborted instruction.
0015  * Note: we read user space.  This means we might cause a data
0016  * abort here if the I-TLB and D-TLB aren't seeing the same
0017  * picture.  Unfortunately, this does happen.  We live with it.
0018  */
0019     .align  5
0020 ENTRY(v6_early_abort)
0021     mrc p15, 0, r1, c5, c0, 0       @ get FSR
0022     mrc p15, 0, r0, c6, c0, 0       @ get FAR
0023 /*
0024  * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
0025  */
0026 #ifdef CONFIG_ARM_ERRATA_326103
0027     ldr ip, =0x4107b36
0028     mrc p15, 0, r3, c0, c0, 0       @ get processor id
0029     teq ip, r3, lsr #4          @ r0 ARM1136?
0030     bne 1f
0031     tst r5, #PSR_J_BIT          @ Java?
0032     tsteq   r5, #PSR_T_BIT          @ Thumb?
0033     bne 1f
0034     bic r1, r1, #1 << 11        @ clear bit 11 of FSR
0035     ldr r3, [r4]            @ read aborted ARM instruction
0036  ARM_BE8(rev    r3, r3)
0037
0038     teq_ldrd tmp=ip, insn=r3        @ insn was LDRD?
0039     beq 1f              @ yes
0040     tst r3, #1 << 20            @ L = 0 -> write
0041     orreq   r1, r1, #1 << 11        @ yes.
0042 #endif
0043 1:  uaccess_disable ip          @ disable userspace access
0044     b   do_DataAbort