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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  Copyright (c) 2003 ARM Limited
0004  *  All Rights Reserved
0005  */
0006 #include <linux/linkage.h>
0007 #include <linux/init.h>
0008 #include <asm/assembler.h>
0009 
0010 /*
0011  * Realview/Versatile Express specific entry point for secondary CPUs.
0012  * This provides a "holding pen" into which all secondary cores are held
0013  * until we're ready for them to initialise.
0014  */
0015 ENTRY(versatile_secondary_startup)
0016  ARM_BE8(setend be)
0017     mrc p15, 0, r0, c0, c0, 5
0018     bic r0, #0xff000000
0019     adr r4, 1f
0020     ldmia   r4, {r5, r6}
0021     sub r4, r4, r5
0022     add r6, r6, r4
0023 pen:    ldr r7, [r6]
0024     cmp r7, r0
0025     bne pen
0026 
0027     /*
0028      * we've been released from the holding pen: secondary_stack
0029      * should now contain the SVC stack for this core
0030      */
0031     b   secondary_startup
0032 
0033     .align
0034 1:  .long   .
0035     .long   versatile_cpu_release
0036 ENDPROC(versatile_secondary_startup)