arm/mach-versatile/dcscb_setup.S

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Created by:  Dave Martin, 2012-06-22
0004  * Copyright:   (C) 2012-2013  Linaro Limited
0005  */
0006
0007 #include <linux/linkage.h>
0008
0009
0010 ENTRY(dcscb_power_up_setup)
0011
0012     cmp r0, #0          @ check affinity level
0013     beq 2f
0014
0015 /*
0016  * Enable cluster-level coherency, in preparation for turning on the MMU.
0017  * The ACTLR SMP bit does not need to be set here, because cpu_resume()
0018  * already restores that.
0019  *
0020  * A15/A7 may not require explicit L2 invalidation on reset, dependent
0021  * on hardware integration decisions.
0022  * For now, this code assumes that L2 is either already invalidated,
0023  * or invalidation is not required.
0024  */
0025
0026     b   cci_enable_port_for_self
0027
0028 2:  @ Implementation-specific local CPU setup operations should go here,
0029     @ if any.  In this case, there is nothing to do.
0030
0031     bx  lr
0032
0033 ENDPROC(dcscb_power_up_setup)