arm/mach-ux500/cpu-db8500.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2008-2009 ST-Ericsson SA
0004  *
0005  * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
0006  */
0007 #include <linux/types.h>
0008 #include <linux/init.h>
0009 #include <linux/device.h>
0010 #include <linux/amba/bus.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/irq.h>
0013 #include <linux/irqchip.h>
0014 #include <linux/irqchip/arm-gic.h>
0015 #include <linux/mfd/dbx500-prcmu.h>
0016 #include <linux/platform_data/arm-ux500-pm.h>
0017 #include <linux/platform_device.h>
0018 #include <linux/io.h>
0019 #include <linux/of.h>
0020 #include <linux/of_address.h>
0021 #include <linux/of_platform.h>
0022 #include <linux/regulator/machine.h>
0023
0024 #include <asm/outercache.h>
0025 #include <asm/hardware/cache-l2x0.h>
0026 #include <asm/mach/map.h>
0027 #include <asm/mach/arch.h>
0028
0029 #include "db8500-regs.h"
0030 #include "pm_domains.h"
0031
0032 static int __init ux500_l2x0_unlock(void)
0033 {
0034     int i;
0035     struct device_node *np;
0036     void __iomem *l2x0_base;
0037
0038     np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
0039     l2x0_base = of_iomap(np, 0);
0040     of_node_put(np);
0041     if (!l2x0_base)
0042         return -ENODEV;
0043
0044     /*
0045      * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
0046      * apparently locks both caches before jumping to the kernel. The
0047      * l2x0 core will not touch the unlock registers if the l2x0 is
0048      * already enabled, so we do it right here instead. The PL310 has
0049      * 8 sets of registers, one per possible CPU.
0050      */
0051     for (i = 0; i < 8; i++) {
0052         writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
0053                    i * L2X0_LOCKDOWN_STRIDE);
0054         writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
0055                    i * L2X0_LOCKDOWN_STRIDE);
0056     }
0057     iounmap(l2x0_base);
0058     return 0;
0059 }
0060
0061 static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
0062 {
0063     /*
0064      * We can't write to secure registers as we are in non-secure
0065      * mode, until we have some SMI service available.
0066      */
0067 }
0068
0069 /*
0070  * FIXME: Should we set up the GPIO domain here?
0071  *
0072  * The problem is that we cannot put the interrupt resources into the platform
0073  * device until the irqdomain has been added. Right now, we set the GIC interrupt
0074  * domain from init_irq(), then load the gpio driver from
0075  * core_initcall(nmk_gpio_init) and add the platform devices from
0076  * arch_initcall(customize_machine).
0077  *
0078  * This feels fragile because it depends on the gpio device getting probed
0079  * _before_ any device uses the gpio interrupts.
0080 */
0081 static void __init ux500_init_irq(void)
0082 {
0083     struct device_node *np;
0084     struct resource r;
0085
0086     irqchip_init();
0087     prcmu_early_init();
0088     np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
0089     of_address_to_resource(np, 0, &r);
0090     of_node_put(np);
0091     if (!r.start) {
0092         pr_err("could not find PRCMU base resource\n");
0093         return;
0094     }
0095     ux500_pm_init(r.start, r.end-r.start);
0096
0097     /* Unlock before init */
0098     ux500_l2x0_unlock();
0099     outer_cache.write_sec = ux500_l2c310_write_sec;
0100 }
0101
0102 static void ux500_restart(enum reboot_mode mode, const char *cmd)
0103 {
0104     local_irq_disable();
0105     local_fiq_disable();
0106
0107     prcmu_system_reset(0);
0108 }
0109
0110 static const struct of_device_id u8500_local_bus_nodes[] = {
0111     /* only create devices below soc node */
0112     { .compatible = "stericsson,db8500", },
0113     { .compatible = "simple-bus"},
0114     { },
0115 };
0116
0117 static void __init u8500_init_machine(void)
0118 {
0119     /* Initialize ux500 power domains */
0120     ux500_pm_domains_init();
0121
0122     of_platform_populate(NULL, u8500_local_bus_nodes,
0123                  NULL, NULL);
0124 }
0125
0126 static const char * stericsson_dt_platform_compat[] = {
0127     "st-ericsson,u8500",
0128     "st-ericsson,u9500",
0129     NULL,
0130 };
0131
0132 DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
0133     .l2c_aux_val    = 0,
0134     .l2c_aux_mask   = ~0,
0135     .init_irq   = ux500_init_irq,
0136     .init_machine   = u8500_init_machine,
0137     .dt_compat      = stericsson_dt_platform_compat,
0138     .restart        = ux500_restart,
0139 MACHINE_END