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0001 /* SPDX-License-Identifier: GPL-2.0-only */ 0002 /* 0003 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. 0004 */ 0005 0006 #ifndef __MACH_TEGRA_IRAMMAP_H 0007 #define __MACH_TEGRA_IRAMMAP_H 0008 0009 #include <linux/sizes.h> 0010 0011 /* The first 1K of IRAM is permanently reserved for the CPU reset handler */ 0012 #define TEGRA_IRAM_RESET_HANDLER_OFFSET 0 0013 #define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K 0014 0015 /* 0016 * This area is used for LPx resume vector, only while LPx power state is 0017 * active. At other times, the AVP may use this area for arbitrary purposes 0018 */ 0019 #define TEGRA_IRAM_LPx_RESUME_AREA (TEGRA_IRAM_BASE + SZ_4K) 0020 0021 #endif
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