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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * arch/arm/mach-spear6xx/spear6xx.c
0004  *
0005  * SPEAr6XX machines common source file
0006  *
0007  * Copyright (C) 2009 ST Microelectronics
0008  * Rajeev Kumar<rajeev-dlh.kumar@st.com>
0009  *
0010  * Copyright 2012 Stefan Roese <sr@denx.de>
0011  */
0012 
0013 #include <linux/amba/pl08x.h>
0014 #include <linux/clk.h>
0015 #include <linux/err.h>
0016 #include <linux/of.h>
0017 #include <linux/of_address.h>
0018 #include <linux/of_platform.h>
0019 #include <linux/amba/pl080.h>
0020 #include <asm/mach/arch.h>
0021 #include <asm/mach/time.h>
0022 #include <asm/mach/map.h>
0023 #include "pl080.h"
0024 #include "generic.h"
0025 #include "spear.h"
0026 #include "misc_regs.h"
0027 
0028 /* dmac device registration */
0029 static struct pl08x_channel_data spear600_dma_info[] = {
0030     {
0031         .bus_id = "ssp1_rx",
0032         .min_signal = 0,
0033         .max_signal = 0,
0034         .muxval = 0,
0035         .periph_buses = PL08X_AHB1,
0036     }, {
0037         .bus_id = "ssp1_tx",
0038         .min_signal = 1,
0039         .max_signal = 1,
0040         .muxval = 0,
0041         .periph_buses = PL08X_AHB1,
0042     }, {
0043         .bus_id = "uart0_rx",
0044         .min_signal = 2,
0045         .max_signal = 2,
0046         .muxval = 0,
0047         .periph_buses = PL08X_AHB1,
0048     }, {
0049         .bus_id = "uart0_tx",
0050         .min_signal = 3,
0051         .max_signal = 3,
0052         .muxval = 0,
0053         .periph_buses = PL08X_AHB1,
0054     }, {
0055         .bus_id = "uart1_rx",
0056         .min_signal = 4,
0057         .max_signal = 4,
0058         .muxval = 0,
0059         .periph_buses = PL08X_AHB1,
0060     }, {
0061         .bus_id = "uart1_tx",
0062         .min_signal = 5,
0063         .max_signal = 5,
0064         .muxval = 0,
0065         .periph_buses = PL08X_AHB1,
0066     }, {
0067         .bus_id = "ssp2_rx",
0068         .min_signal = 6,
0069         .max_signal = 6,
0070         .muxval = 0,
0071         .periph_buses = PL08X_AHB2,
0072     }, {
0073         .bus_id = "ssp2_tx",
0074         .min_signal = 7,
0075         .max_signal = 7,
0076         .muxval = 0,
0077         .periph_buses = PL08X_AHB2,
0078     }, {
0079         .bus_id = "ssp0_rx",
0080         .min_signal = 8,
0081         .max_signal = 8,
0082         .muxval = 0,
0083         .periph_buses = PL08X_AHB1,
0084     }, {
0085         .bus_id = "ssp0_tx",
0086         .min_signal = 9,
0087         .max_signal = 9,
0088         .muxval = 0,
0089         .periph_buses = PL08X_AHB1,
0090     }, {
0091         .bus_id = "i2c_rx",
0092         .min_signal = 10,
0093         .max_signal = 10,
0094         .muxval = 0,
0095         .periph_buses = PL08X_AHB1,
0096     }, {
0097         .bus_id = "i2c_tx",
0098         .min_signal = 11,
0099         .max_signal = 11,
0100         .muxval = 0,
0101         .periph_buses = PL08X_AHB1,
0102     }, {
0103         .bus_id = "irda",
0104         .min_signal = 12,
0105         .max_signal = 12,
0106         .muxval = 0,
0107         .periph_buses = PL08X_AHB1,
0108     }, {
0109         .bus_id = "adc",
0110         .min_signal = 13,
0111         .max_signal = 13,
0112         .muxval = 0,
0113         .periph_buses = PL08X_AHB2,
0114     }, {
0115         .bus_id = "to_jpeg",
0116         .min_signal = 14,
0117         .max_signal = 14,
0118         .muxval = 0,
0119         .periph_buses = PL08X_AHB1,
0120     }, {
0121         .bus_id = "from_jpeg",
0122         .min_signal = 15,
0123         .max_signal = 15,
0124         .muxval = 0,
0125         .periph_buses = PL08X_AHB1,
0126     }, {
0127         .bus_id = "ras0_rx",
0128         .min_signal = 0,
0129         .max_signal = 0,
0130         .muxval = 1,
0131         .periph_buses = PL08X_AHB1,
0132     }, {
0133         .bus_id = "ras0_tx",
0134         .min_signal = 1,
0135         .max_signal = 1,
0136         .muxval = 1,
0137         .periph_buses = PL08X_AHB1,
0138     }, {
0139         .bus_id = "ras1_rx",
0140         .min_signal = 2,
0141         .max_signal = 2,
0142         .muxval = 1,
0143         .periph_buses = PL08X_AHB1,
0144     }, {
0145         .bus_id = "ras1_tx",
0146         .min_signal = 3,
0147         .max_signal = 3,
0148         .muxval = 1,
0149         .periph_buses = PL08X_AHB1,
0150     }, {
0151         .bus_id = "ras2_rx",
0152         .min_signal = 4,
0153         .max_signal = 4,
0154         .muxval = 1,
0155         .periph_buses = PL08X_AHB1,
0156     }, {
0157         .bus_id = "ras2_tx",
0158         .min_signal = 5,
0159         .max_signal = 5,
0160         .muxval = 1,
0161         .periph_buses = PL08X_AHB1,
0162     }, {
0163         .bus_id = "ras3_rx",
0164         .min_signal = 6,
0165         .max_signal = 6,
0166         .muxval = 1,
0167         .periph_buses = PL08X_AHB1,
0168     }, {
0169         .bus_id = "ras3_tx",
0170         .min_signal = 7,
0171         .max_signal = 7,
0172         .muxval = 1,
0173         .periph_buses = PL08X_AHB1,
0174     }, {
0175         .bus_id = "ras4_rx",
0176         .min_signal = 8,
0177         .max_signal = 8,
0178         .muxval = 1,
0179         .periph_buses = PL08X_AHB1,
0180     }, {
0181         .bus_id = "ras4_tx",
0182         .min_signal = 9,
0183         .max_signal = 9,
0184         .muxval = 1,
0185         .periph_buses = PL08X_AHB1,
0186     }, {
0187         .bus_id = "ras5_rx",
0188         .min_signal = 10,
0189         .max_signal = 10,
0190         .muxval = 1,
0191         .periph_buses = PL08X_AHB1,
0192     }, {
0193         .bus_id = "ras5_tx",
0194         .min_signal = 11,
0195         .max_signal = 11,
0196         .muxval = 1,
0197         .periph_buses = PL08X_AHB1,
0198     }, {
0199         .bus_id = "ras6_rx",
0200         .min_signal = 12,
0201         .max_signal = 12,
0202         .muxval = 1,
0203         .periph_buses = PL08X_AHB1,
0204     }, {
0205         .bus_id = "ras6_tx",
0206         .min_signal = 13,
0207         .max_signal = 13,
0208         .muxval = 1,
0209         .periph_buses = PL08X_AHB1,
0210     }, {
0211         .bus_id = "ras7_rx",
0212         .min_signal = 14,
0213         .max_signal = 14,
0214         .muxval = 1,
0215         .periph_buses = PL08X_AHB1,
0216     }, {
0217         .bus_id = "ras7_tx",
0218         .min_signal = 15,
0219         .max_signal = 15,
0220         .muxval = 1,
0221         .periph_buses = PL08X_AHB1,
0222     }, {
0223         .bus_id = "ext0_rx",
0224         .min_signal = 0,
0225         .max_signal = 0,
0226         .muxval = 2,
0227         .periph_buses = PL08X_AHB2,
0228     }, {
0229         .bus_id = "ext0_tx",
0230         .min_signal = 1,
0231         .max_signal = 1,
0232         .muxval = 2,
0233         .periph_buses = PL08X_AHB2,
0234     }, {
0235         .bus_id = "ext1_rx",
0236         .min_signal = 2,
0237         .max_signal = 2,
0238         .muxval = 2,
0239         .periph_buses = PL08X_AHB2,
0240     }, {
0241         .bus_id = "ext1_tx",
0242         .min_signal = 3,
0243         .max_signal = 3,
0244         .muxval = 2,
0245         .periph_buses = PL08X_AHB2,
0246     }, {
0247         .bus_id = "ext2_rx",
0248         .min_signal = 4,
0249         .max_signal = 4,
0250         .muxval = 2,
0251         .periph_buses = PL08X_AHB2,
0252     }, {
0253         .bus_id = "ext2_tx",
0254         .min_signal = 5,
0255         .max_signal = 5,
0256         .muxval = 2,
0257         .periph_buses = PL08X_AHB2,
0258     }, {
0259         .bus_id = "ext3_rx",
0260         .min_signal = 6,
0261         .max_signal = 6,
0262         .muxval = 2,
0263         .periph_buses = PL08X_AHB2,
0264     }, {
0265         .bus_id = "ext3_tx",
0266         .min_signal = 7,
0267         .max_signal = 7,
0268         .muxval = 2,
0269         .periph_buses = PL08X_AHB2,
0270     }, {
0271         .bus_id = "ext4_rx",
0272         .min_signal = 8,
0273         .max_signal = 8,
0274         .muxval = 2,
0275         .periph_buses = PL08X_AHB2,
0276     }, {
0277         .bus_id = "ext4_tx",
0278         .min_signal = 9,
0279         .max_signal = 9,
0280         .muxval = 2,
0281         .periph_buses = PL08X_AHB2,
0282     }, {
0283         .bus_id = "ext5_rx",
0284         .min_signal = 10,
0285         .max_signal = 10,
0286         .muxval = 2,
0287         .periph_buses = PL08X_AHB2,
0288     }, {
0289         .bus_id = "ext5_tx",
0290         .min_signal = 11,
0291         .max_signal = 11,
0292         .muxval = 2,
0293         .periph_buses = PL08X_AHB2,
0294     }, {
0295         .bus_id = "ext6_rx",
0296         .min_signal = 12,
0297         .max_signal = 12,
0298         .muxval = 2,
0299         .periph_buses = PL08X_AHB2,
0300     }, {
0301         .bus_id = "ext6_tx",
0302         .min_signal = 13,
0303         .max_signal = 13,
0304         .muxval = 2,
0305         .periph_buses = PL08X_AHB2,
0306     }, {
0307         .bus_id = "ext7_rx",
0308         .min_signal = 14,
0309         .max_signal = 14,
0310         .muxval = 2,
0311         .periph_buses = PL08X_AHB2,
0312     }, {
0313         .bus_id = "ext7_tx",
0314         .min_signal = 15,
0315         .max_signal = 15,
0316         .muxval = 2,
0317         .periph_buses = PL08X_AHB2,
0318     },
0319 };
0320 
0321 static struct pl08x_platform_data spear6xx_pl080_plat_data = {
0322     .memcpy_burst_size = PL08X_BURST_SZ_16,
0323     .memcpy_bus_width = PL08X_BUS_WIDTH_32_BITS,
0324     .memcpy_prot_buff = true,
0325     .memcpy_prot_cache = true,
0326     .lli_buses = PL08X_AHB1,
0327     .mem_buses = PL08X_AHB1,
0328     .get_xfer_signal = pl080_get_signal,
0329     .put_xfer_signal = pl080_put_signal,
0330     .slave_channels = spear600_dma_info,
0331     .num_slave_channels = ARRAY_SIZE(spear600_dma_info),
0332 };
0333 
0334 /*
0335  * Following will create 16MB static virtual/physical mappings
0336  * PHYSICAL     VIRTUAL
0337  * 0xF0000000       0xF0000000
0338  * 0xF1000000       0xF1000000
0339  * 0xD0000000       0xFD000000
0340  * 0xFC000000       0xFC000000
0341  */
0342 struct map_desc spear6xx_io_desc[] __initdata = {
0343     {
0344         .virtual    = (unsigned long)VA_SPEAR6XX_ML_CPU_BASE,
0345         .pfn        = __phys_to_pfn(SPEAR_ICM3_ML1_2_BASE),
0346         .length     = 2 * SZ_16M,
0347         .type       = MT_DEVICE
0348     },  {
0349         .virtual    = (unsigned long)VA_SPEAR_ICM1_2_BASE,
0350         .pfn        = __phys_to_pfn(SPEAR_ICM1_2_BASE),
0351         .length     = SZ_16M,
0352         .type       = MT_DEVICE
0353     }, {
0354         .virtual    = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
0355         .pfn        = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
0356         .length     = SZ_16M,
0357         .type       = MT_DEVICE
0358     },
0359 };
0360 
0361 /* This will create static memory mapping for selected devices */
0362 void __init spear6xx_map_io(void)
0363 {
0364     iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
0365 }
0366 
0367 void __init spear6xx_timer_init(void)
0368 {
0369     char pclk_name[] = "pll3_clk";
0370     struct clk *gpt_clk, *pclk;
0371 
0372     spear6xx_clk_init(MISC_BASE);
0373 
0374     /* get the system timer clock */
0375     gpt_clk = clk_get_sys("gpt0", NULL);
0376     if (IS_ERR(gpt_clk)) {
0377         pr_err("%s:couldn't get clk for gpt\n", __func__);
0378         BUG();
0379     }
0380 
0381     /* get the suitable parent clock for timer*/
0382     pclk = clk_get(NULL, pclk_name);
0383     if (IS_ERR(pclk)) {
0384         pr_err("%s:couldn't get %s as parent for gpt\n",
0385                 __func__, pclk_name);
0386         BUG();
0387     }
0388 
0389     clk_set_parent(gpt_clk, pclk);
0390     clk_put(gpt_clk);
0391     clk_put(pclk);
0392 
0393     spear_setup_of_timer();
0394 }
0395 
0396 /* Add auxdata to pass platform data */
0397 struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = {
0398     OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
0399             &spear6xx_pl080_plat_data),
0400     {}
0401 };
0402 
0403 static void __init spear600_dt_init(void)
0404 {
0405     of_platform_default_populate(NULL, spear6xx_auxdata_lookup, NULL);
0406 }
0407 
0408 static const char *spear600_dt_board_compat[] = {
0409     "st,spear600",
0410     NULL
0411 };
0412 
0413 DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
0414     .map_io     =   spear6xx_map_io,
0415     .init_time  =   spear6xx_timer_init,
0416     .init_machine   =   spear600_dt_init,
0417     .restart    =   spear_restart,
0418     .dt_compat  =   spear600_dt_board_compat,
0419 MACHINE_END
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