arm/mach-socfpga/l2_cache.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright Altera Corporation (C) 2016. All rights reserved.
0004  */
0005 #include <linux/io.h>
0006 #include <linux/of_platform.h>
0007 #include <linux/of_address.h>
0008
0009 #include "core.h"
0010
0011 /* A10 System Manager L2 ECC Control register */
0012 #define A10_MPU_CTRL_L2_ECC_OFST          0x0
0013 #define A10_MPU_CTRL_L2_ECC_EN            BIT(0)
0014
0015 /* A10 System Manager Global IRQ Mask register */
0016 #define A10_SYSMGR_ECC_INTMASK_CLR_OFST   0x98
0017 #define A10_SYSMGR_ECC_INTMASK_CLR_L2     BIT(0)
0018
0019 /* A10 System Manager L2 ECC IRQ Clear register */
0020 #define A10_SYSMGR_MPU_CLEAR_L2_ECC_OFST  0xA8
0021 #define A10_SYSMGR_MPU_CLEAR_L2_ECC       (BIT(31) | BIT(15))
0022
0023 void socfpga_init_l2_ecc(void)
0024 {
0025     struct device_node *np;
0026     void __iomem *mapped_l2_edac_addr;
0027
0028     np = of_find_compatible_node(NULL, NULL, "altr,socfpga-l2-ecc");
0029     if (!np) {
0030         pr_err("Unable to find socfpga-l2-ecc in dtb\n");
0031         return;
0032     }
0033
0034     mapped_l2_edac_addr = of_iomap(np, 0);
0035     of_node_put(np);
0036     if (!mapped_l2_edac_addr) {
0037         pr_err("Unable to find L2 ECC mapping in dtb\n");
0038         return;
0039     }
0040
0041     /* Enable ECC */
0042     writel(0x01, mapped_l2_edac_addr);
0043     iounmap(mapped_l2_edac_addr);
0044 }
0045
0046 void socfpga_init_arria10_l2_ecc(void)
0047 {
0048     struct device_node *np;
0049     void __iomem *mapped_l2_edac_addr;
0050
0051     /* Find the L2 EDAC device tree node */
0052     np = of_find_compatible_node(NULL, NULL, "altr,socfpga-a10-l2-ecc");
0053     if (!np) {
0054         pr_err("Unable to find socfpga-a10-l2-ecc in dtb\n");
0055         return;
0056     }
0057
0058     mapped_l2_edac_addr = of_iomap(np, 0);
0059     of_node_put(np);
0060     if (!mapped_l2_edac_addr) {
0061         pr_err("Unable to find L2 ECC mapping in dtb\n");
0062         return;
0063     }
0064
0065     if (!sys_manager_base_addr) {
0066         pr_err("System Manager not mapped for L2 ECC\n");
0067         goto exit;
0068     }
0069     /* Clear any pending IRQs */
0070     writel(A10_SYSMGR_MPU_CLEAR_L2_ECC, (sys_manager_base_addr +
0071            A10_SYSMGR_MPU_CLEAR_L2_ECC_OFST));
0072     /* Enable ECC */
0073     writel(A10_SYSMGR_ECC_INTMASK_CLR_L2, sys_manager_base_addr +
0074            A10_SYSMGR_ECC_INTMASK_CLR_OFST);
0075     writel(A10_MPU_CTRL_L2_ECC_EN, mapped_l2_edac_addr +
0076            A10_MPU_CTRL_L2_ECC_OFST);
0077 exit:
0078     iounmap(mapped_l2_edac_addr);
0079 }