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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * r8a7778 processor support
0004  *
0005  * Copyright (C) 2013  Renesas Solutions Corp.
0006  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
0007  * Copyright (C) 2013  Cogent Embedded, Inc.
0008  */
0009 
0010 #include <linux/io.h>
0011 #include <linux/irqchip.h>
0012 
0013 #include <asm/mach/arch.h>
0014 
0015 #include "common.h"
0016 
0017 #define HPBREG_BASE 0xfe700000
0018 
0019 #define INT2SMSKCR0 0x82288 /* 0xfe782288 */
0020 #define INT2SMSKCR1 0x8228c /* 0xfe78228c */
0021 
0022 #define INT2NTSR0   0x00018 /* 0xfe700018 */
0023 #define INT2NTSR1   0x0002c /* 0xfe70002c */
0024 
0025 static void __init r8a7778_init_irq_dt(void)
0026 {
0027     void __iomem *base = ioremap(HPBREG_BASE, 0x00100000);
0028 
0029     BUG_ON(!base);
0030 
0031     irqchip_init();
0032 
0033     /* route all interrupts to ARM */
0034     writel(0x73ffffff, base + INT2NTSR0);
0035     writel(0xffffffff, base + INT2NTSR1);
0036 
0037     /* unmask all known interrupts in INTCS2 */
0038     writel(0x08330773, base + INT2SMSKCR0);
0039     writel(0x00311110, base + INT2SMSKCR1);
0040 
0041     iounmap(base);
0042 }
0043 
0044 static const char *const r8a7778_compat_dt[] __initconst = {
0045     "renesas,r8a7778",
0046     NULL
0047 };
0048 
0049 DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
0050     .init_early = shmobile_init_delay,
0051     .init_irq   = r8a7778_init_irq_dt,
0052     .init_late  = shmobile_init_late,
0053     .dt_compat  = r8a7778_compat_dt,
0054 MACHINE_END