arm/mach-shmobile/setup-r8a7740.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * R8A7740 processor support
0004  *
0005  * Copyright (C) 2011  Renesas Solutions Corp.
0006  * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
0007  */
0008 #include <linux/kernel.h>
0009 #include <linux/init.h>
0010 #include <linux/io.h>
0011 #include <linux/irqchip.h>
0012 #include <linux/irqchip/arm-gic.h>
0013
0014 #include <asm/mach/map.h>
0015 #include <asm/mach/arch.h>
0016 #include <asm/mach/time.h>
0017
0018 #include "common.h"
0019
0020 /*
0021  * r8a7740 chip has lasting errata on MERAM buffer.
0022  * this is work-around for it.
0023  * see
0024  *  "Media RAM (MERAM)" on r8a7740 documentation
0025  */
0026 #define MEBUFCNTR   0xFE950098
0027 static void __init r8a7740_meram_workaround(void)
0028 {
0029     void __iomem *reg;
0030
0031     reg = ioremap(MEBUFCNTR, 4);
0032     if (reg) {
0033         iowrite32(0x01600164, reg);
0034         iounmap(reg);
0035     }
0036 }
0037
0038 static void __init r8a7740_init_irq_of(void)
0039 {
0040     void __iomem *intc_prio_base = ioremap(0xe6900010, 0x10);
0041     void __iomem *intc_msk_base = ioremap(0xe6900040, 0x10);
0042     void __iomem *pfc_inta_ctrl = ioremap(0xe605807c, 0x4);
0043
0044     irqchip_init();
0045
0046     /* route signals to GIC */
0047     iowrite32(0x0, pfc_inta_ctrl);
0048
0049     /*
0050      * To mask the shared interrupt to SPI 149 we must ensure to set
0051      * PRIO *and* MASK. Else we run into IRQ floods when registering
0052      * the intc_irqpin devices
0053      */
0054     iowrite32(0x0, intc_prio_base + 0x0);
0055     iowrite32(0x0, intc_prio_base + 0x4);
0056     iowrite32(0x0, intc_prio_base + 0x8);
0057     iowrite32(0x0, intc_prio_base + 0xc);
0058     iowrite8(0xff, intc_msk_base + 0x0);
0059     iowrite8(0xff, intc_msk_base + 0x4);
0060     iowrite8(0xff, intc_msk_base + 0x8);
0061     iowrite8(0xff, intc_msk_base + 0xc);
0062
0063     iounmap(intc_prio_base);
0064     iounmap(intc_msk_base);
0065     iounmap(pfc_inta_ctrl);
0066 }
0067
0068 static void __init r8a7740_generic_init(void)
0069 {
0070     r8a7740_meram_workaround();
0071 }
0072
0073 static const char *const r8a7740_boards_compat_dt[] __initconst = {
0074     "renesas,r8a7740",
0075     NULL
0076 };
0077
0078 DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
0079     .l2c_aux_val    = 0,
0080     .l2c_aux_mask   = ~0,
0081     .init_early = shmobile_init_delay,
0082     .init_irq   = r8a7740_init_irq_of,
0083     .init_machine   = r8a7740_generic_init,
0084     .init_late  = shmobile_init_late,
0085     .dt_compat  = r8a7740_boards_compat_dt,
0086 MACHINE_END