arm/mach-s3c/sleep-s3c64xx.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* linux/arch/arm/plat-s3c64xx/sleep.S
0003  *
0004  * Copyright 2008 Openmoko, Inc.
0005  * Copyright 2008 Simtec Electronics
0006  *  Ben Dooks <ben@simtec.co.uk>
0007  *  http://armlinux.simtec.co.uk/
0008  *
0009  * S3C64XX CPU sleep code
0010  */
0011
0012 #include <linux/linkage.h>
0013 #include <asm/assembler.h>
0014 #include "map.h"
0015
0016 #undef S3C64XX_VA_GPIO
0017 #define S3C64XX_VA_GPIO (0x0)
0018
0019 #include "regs-gpio.h"
0020
0021 #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT))
0022
0023     .text
0024
0025     /* Sleep magic, the word before the resume entry point so that the
0026      * bootloader can check for a resumeable image. */
0027
0028     .word   0x2bedf00d
0029
0030     /* s3c_cpu_reusme
0031      *
0032      * This is the entry point, stored by whatever method the bootloader
0033      * requires to get the kernel runnign again. This code expects to be
0034      * entered with no caches live and the MMU disabled. It will then
0035      * restore the MMU and other basic CP registers saved and restart
0036      * the kernel C code to finish the resume code.
0037     */
0038
0039 ENTRY(s3c_cpu_resume)
0040     msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
0041     ldr r2, =LL_UART        /* for debug */
0042
0043 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
0044
0045 #define S3C64XX_GPNCON          (S3C64XX_GPN_BASE + 0x00)
0046 #define S3C64XX_GPNDAT          (S3C64XX_GPN_BASE + 0x04)
0047
0048 #define S3C64XX_GPN_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
0049 #define S3C64XX_GPN_OUTPUT(__gpio)  (0x1 << ((__gpio) * 2))
0050
0051     /* Initialise the GPIO state if we are debugging via the SMDK LEDs,
0052      * as the uboot version supplied resets these to inputs during the
0053      * resume checks.
0054     */
0055
0056     ldr r3, =S3C64XX_PA_GPIO
0057     ldr r0, [ r3, #S3C64XX_GPNCON ]
0058     bic r0, r0, #(S3C64XX_GPN_CONMASK(12) | S3C64XX_GPN_CONMASK(13) | \
0059               S3C64XX_GPN_CONMASK(14) | S3C64XX_GPN_CONMASK(15))
0060     orr r0, r0, #(S3C64XX_GPN_OUTPUT(12) | S3C64XX_GPN_OUTPUT(13) | \
0061               S3C64XX_GPN_OUTPUT(14) | S3C64XX_GPN_OUTPUT(15))
0062     str r0, [ r3, #S3C64XX_GPNCON ]
0063
0064     ldr r0, [ r3, #S3C64XX_GPNDAT ]
0065     bic r0, r0, #0xf << 12          @ GPN12..15
0066     orr r0, r0, #1 << 15            @ GPN15
0067     str r0, [ r3, #S3C64XX_GPNDAT ]
0068 #endif
0069     b   cpu_resume