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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright (c) 2004 Simtec Electronics
0004  *  Ben Dooks <ben@simtec.co.uk>
0005  *
0006  * S3C2410 Power Manager (Suspend-To-RAM) support
0007  *
0008  * Based on PXA/SA1100 sleep code by:
0009  *  Nicolas Pitre, (c) 2002 Monta Vista Software Inc
0010  *  Cliff Brake, (c) 2001
0011  */
0012 
0013 #include <linux/linkage.h>
0014 #include <linux/serial_s3c.h>
0015 #include <asm/assembler.h>
0016 #include "map.h"
0017 
0018 #include "regs-gpio.h"
0019 #include "regs-clock.h"
0020 
0021 /*
0022  * S3C24XX_DEBUG_RESUME is dangerous if your bootloader does not
0023  * reset the UART configuration, only enable if you really need this!
0024  */
0025 //#define S3C24XX_DEBUG_RESUME
0026 
0027     .text
0028 
0029     /* sleep magic, to allow the bootloader to check for an valid
0030      * image to resume to. Must be the first word before the
0031      * s3c_cpu_resume entry.
0032     */
0033 
0034     .word   0x2bedf00d
0035 
0036     /* s3c_cpu_resume
0037      *
0038      * resume code entry for bootloader to call
0039     */
0040 
0041 ENTRY(s3c_cpu_resume)
0042     mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
0043     msr cpsr_c, r0
0044 
0045     @@ load UART to allow us to print the two characters for
0046     @@ resume debug
0047 
0048     mov r2, #S3C24XX_PA_UART & 0xff000000
0049     orr r2, r2, #S3C24XX_PA_UART & 0xff000
0050 
0051 #if 0
0052     /* SMDK2440 LED set */
0053     mov r14, #S3C24XX_PA_GPIO
0054     ldr r12, [ r14, #0x54 ]
0055     bic r12, r12, #3<<4
0056     orr r12, r12, #1<<7
0057     str r12, [ r14, #0x54 ]
0058 #endif
0059 
0060 #ifdef S3C24XX_DEBUG_RESUME
0061     mov r3, #'L'
0062     strb    r3, [ r2, #S3C2410_UTXH ]
0063 1001:
0064     ldrb    r14, [ r3, #S3C2410_UTRSTAT ]
0065     tst r14, #S3C2410_UTRSTAT_TXE
0066     beq 1001b
0067 #endif /* S3C24XX_DEBUG_RESUME */
0068 
0069     b   cpu_resume