arm/mach-s3c/pm-core-s3c64xx.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright 2008 Openmoko, Inc.
0004  * Copyright 2008 Simtec Electronics
0005  *      Ben Dooks <ben@simtec.co.uk>
0006  *      http://armlinux.simtec.co.uk/
0007  *
0008  * S3C64XX - PM core support for arch/arm/plat-s3c/pm.c
0009  */
0010
0011 #ifndef __MACH_S3C64XX_PM_CORE_H
0012 #define __MACH_S3C64XX_PM_CORE_H __FILE__
0013
0014 #include <linux/serial_s3c.h>
0015 #include <linux/delay.h>
0016
0017 #include "regs-gpio.h"
0018 #include "regs-clock.h"
0019 #include "map.h"
0020
0021 static inline void s3c_pm_debug_init_uart(void)
0022 {
0023 #ifdef CONFIG_SAMSUNG_PM_DEBUG
0024     u32 tmp = __raw_readl(S3C_PCLK_GATE);
0025
0026     /* As a note, since the S3C64XX UARTs generally have multiple
0027      * clock sources, we simply enable PCLK at the moment and hope
0028      * that the resume settings for the UART are suitable for the
0029      * use with PCLK.
0030      */
0031
0032     tmp |= S3C_CLKCON_PCLK_UART0;
0033     tmp |= S3C_CLKCON_PCLK_UART1;
0034     tmp |= S3C_CLKCON_PCLK_UART2;
0035     tmp |= S3C_CLKCON_PCLK_UART3;
0036
0037     __raw_writel(tmp, S3C_PCLK_GATE);
0038     udelay(10);
0039 #endif
0040 }
0041
0042 static inline void s3c_pm_arch_prepare_irqs(void)
0043 {
0044     /* VIC should have already been taken care of */
0045
0046     /* clear any pending EINT0 interrupts */
0047     __raw_writel(__raw_readl(S3C64XX_EINT0PEND), S3C64XX_EINT0PEND);
0048 }
0049
0050 static inline void s3c_pm_arch_stop_clocks(void)
0051 {
0052 }
0053
0054 static inline void s3c_pm_arch_show_resume_irqs(void)
0055 {
0056 }
0057
0058 /* make these defines, we currently do not have any need to change
0059  * the IRQ wake controls depending on the CPU we are running on */
0060 #ifdef CONFIG_PM_SLEEP
0061 #define s3c_irqwake_eintallow   ((1 << 28) - 1)
0062 #define s3c_irqwake_intallow    (~0)
0063 #else
0064 #define s3c_irqwake_eintallow 0
0065 #define s3c_irqwake_intallow  0
0066 #endif
0067
0068 static inline void s3c_pm_restored_gpios(void)
0069 {
0070     /* ensure sleep mode has been cleared from the system */
0071
0072     __raw_writel(0, S3C64XX_SLPEN);
0073 }
0074
0075 static inline void samsung_pm_saved_gpios(void)
0076 {
0077     /* turn on the sleep mode and keep it there, as it seems that during
0078      * suspend the xCON registers get re-set and thus you can end up with
0079      * problems between going to sleep and resuming.
0080      */
0081
0082     __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN);
0083 }
0084 #endif /* __MACH_S3C64XX_PM_CORE_H */