0001
0002
0003
0004
0005
0006
0007
0008
0009
0010 #include <linux/delay.h>
0011 #include <linux/io.h>
0012
0013 #include "regs-clock.h"
0014 #include "regs-irq-s3c24xx.h"
0015 #include "irqs.h"
0016
0017 static inline void s3c_pm_debug_init_uart(void)
0018 {
0019 #ifdef CONFIG_SAMSUNG_PM_DEBUG
0020 unsigned long tmp = __raw_readl(S3C2410_CLKCON);
0021
0022
0023 tmp |= S3C2410_CLKCON_UART0;
0024 tmp |= S3C2410_CLKCON_UART1;
0025 tmp |= S3C2410_CLKCON_UART2;
0026
0027 __raw_writel(tmp, S3C2410_CLKCON);
0028 udelay(10);
0029 #endif
0030 }
0031
0032 static inline void s3c_pm_arch_prepare_irqs(void)
0033 {
0034 __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK);
0035 __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK);
0036
0037
0038
0039 __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND);
0040 __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND);
0041 __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND);
0042
0043 }
0044
0045 static inline void s3c_pm_arch_stop_clocks(void)
0046 {
0047 __raw_writel(0x00, S3C2410_CLKCON);
0048 }
0049
0050
0051
0052
0053
0054 static inline void s3c_pm_show_resume_irqs(int start, unsigned long which,
0055 unsigned long mask)
0056 {
0057 int i;
0058
0059 which &= ~mask;
0060
0061 for (i = 0; i <= 31; i++) {
0062 if (which & (1L<<i)) {
0063 S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
0064 }
0065 }
0066 }
0067
0068 static inline void s3c_pm_arch_show_resume_irqs(void)
0069 {
0070 S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n",
0071 __raw_readl(S3C2410_SRCPND),
0072 __raw_readl(S3C2410_EINTPEND));
0073
0074 s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND),
0075 s3c_irqwake_intmask);
0076
0077 s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND),
0078 s3c_irqwake_eintmask);
0079 }
0080
0081 static inline void s3c_pm_restored_gpios(void) { }
0082 static inline void samsung_pm_saved_gpios(void) { }
0083
0084
0085
0086
0087
0088
0089
0090 #ifdef CONFIG_PM_SLEEP
0091 #define s3c_irqwake_intallow (1L << 30 | 0xfL)
0092 #define s3c_irqwake_eintallow (0x0000fff0L)
0093 #else
0094 #define s3c_irqwake_eintallow 0
0095 #define s3c_irqwake_intallow 0
0096 #endif