Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright 2008 Openmoko, Inc.
0004  * Copyright 2008 Simtec Electronics
0005  *  http://armlinux.simtec.co.uk/
0006  *  Ben Dooks <ben@simtec.co.uk>
0007  *
0008  * S3C64XX - Memory map definitions
0009  */
0010 
0011 #ifndef __ASM_ARCH_MAP_H
0012 #define __ASM_ARCH_MAP_H __FILE__
0013 
0014 #include "map-base.h"
0015 #include "map-s3c.h"
0016 
0017 /*
0018  * Post-mux Chip Select Regions Xm0CSn_
0019  * These may be used by SROM, NAND or CF depending on settings
0020  */
0021 
0022 #define S3C64XX_PA_XM0CSN0 (0x10000000)
0023 #define S3C64XX_PA_XM0CSN1 (0x18000000)
0024 #define S3C64XX_PA_XM0CSN2 (0x20000000)
0025 #define S3C64XX_PA_XM0CSN3 (0x28000000)
0026 #define S3C64XX_PA_XM0CSN4 (0x30000000)
0027 #define S3C64XX_PA_XM0CSN5 (0x38000000)
0028 
0029 /* HSMMC units */
0030 #define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000))
0031 #define S3C64XX_PA_HSMMC0   S3C64XX_PA_HSMMC(0)
0032 #define S3C64XX_PA_HSMMC1   S3C64XX_PA_HSMMC(1)
0033 #define S3C64XX_PA_HSMMC2   S3C64XX_PA_HSMMC(2)
0034 
0035 #define S3C_PA_UART     (0x7F005000)
0036 #define S3C_PA_UART0        (S3C_PA_UART + 0x00)
0037 #define S3C_PA_UART1        (S3C_PA_UART + 0x400)
0038 #define S3C_PA_UART2        (S3C_PA_UART + 0x800)
0039 #define S3C_PA_UART3        (S3C_PA_UART + 0xC00)
0040 #define S3C_UART_OFFSET     (0x400)
0041 
0042 /* See notes on UART VA mapping in debug-macro.S */
0043 #define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
0044 
0045 #define S3C_VA_UART0        S3C_VA_UARTx(0)
0046 #define S3C_VA_UART1        S3C_VA_UARTx(1)
0047 #define S3C_VA_UART2        S3C_VA_UARTx(2)
0048 #define S3C_VA_UART3        S3C_VA_UARTx(3)
0049 
0050 #define S3C64XX_PA_SROM     (0x70000000)
0051 
0052 #define S3C64XX_PA_ONENAND0 (0x70100000)
0053 #define S3C64XX_PA_ONENAND0_BUF (0x20000000)
0054 #define S3C64XX_SZ_ONENAND0_BUF (SZ_64M)
0055 
0056 /* NAND and OneNAND1 controllers occupy the same register region
0057    (depending on SoC POP version) */
0058 #define S3C64XX_PA_ONENAND1 (0x70200000)
0059 #define S3C64XX_PA_ONENAND1_BUF (0x28000000)
0060 #define S3C64XX_SZ_ONENAND1_BUF (SZ_64M)
0061 
0062 #define S3C64XX_PA_NAND     (0x70200000)
0063 #define S3C64XX_PA_FB       (0x77100000)
0064 #define S3C64XX_PA_USB_HSOTG    (0x7C000000)
0065 #define S3C64XX_PA_WATCHDOG (0x7E004000)
0066 #define S3C64XX_PA_RTC      (0x7E005000)
0067 #define S3C64XX_PA_KEYPAD   (0x7E00A000)
0068 #define S3C64XX_PA_ADC      (0x7E00B000)
0069 #define S3C64XX_PA_SYSCON   (0x7E00F000)
0070 #define S3C64XX_PA_AC97     (0x7F001000)
0071 #define S3C64XX_PA_IIS0     (0x7F002000)
0072 #define S3C64XX_PA_IIS1     (0x7F003000)
0073 #define S3C64XX_PA_TIMER    (0x7F006000)
0074 #define S3C64XX_PA_IIC0     (0x7F004000)
0075 #define S3C64XX_PA_SPI0     (0x7F00B000)
0076 #define S3C64XX_PA_SPI1     (0x7F00C000)
0077 #define S3C64XX_PA_PCM0     (0x7F009000)
0078 #define S3C64XX_PA_PCM1     (0x7F00A000)
0079 #define S3C64XX_PA_IISV4    (0x7F00D000)
0080 #define S3C64XX_PA_IIC1     (0x7F00F000)
0081 
0082 #define S3C64XX_PA_GPIO     (0x7F008000)
0083 #define S3C64XX_SZ_GPIO     SZ_4K
0084 
0085 #define S3C64XX_PA_SDRAM    (0x50000000)
0086 
0087 #define S3C64XX_PA_CFCON    (0x70300000)
0088 
0089 #define S3C64XX_PA_VIC0     (0x71200000)
0090 #define S3C64XX_PA_VIC1     (0x71300000)
0091 
0092 #define S3C64XX_PA_MODEM    (0x74108000)
0093 
0094 #define S3C64XX_PA_USBHOST  (0x74300000)
0095 
0096 #define S3C64XX_PA_USB_HSPHY    (0x7C100000)
0097 
0098 /* compatibility defines. */
0099 #define S3C_PA_TIMER        S3C64XX_PA_TIMER
0100 #define S3C_PA_HSMMC0       S3C64XX_PA_HSMMC0
0101 #define S3C_PA_HSMMC1       S3C64XX_PA_HSMMC1
0102 #define S3C_PA_HSMMC2       S3C64XX_PA_HSMMC2
0103 #define S3C_PA_IIC      S3C64XX_PA_IIC0
0104 #define S3C_PA_IIC1     S3C64XX_PA_IIC1
0105 #define S3C_PA_NAND     S3C64XX_PA_NAND
0106 #define S3C_PA_ONENAND      S3C64XX_PA_ONENAND0
0107 #define S3C_PA_ONENAND_BUF  S3C64XX_PA_ONENAND0_BUF
0108 #define S3C_SZ_ONENAND_BUF  S3C64XX_SZ_ONENAND0_BUF
0109 #define S3C_PA_FB       S3C64XX_PA_FB
0110 #define S3C_PA_USBHOST      S3C64XX_PA_USBHOST
0111 #define S3C_PA_USB_HSOTG    S3C64XX_PA_USB_HSOTG
0112 #define S3C_PA_RTC      S3C64XX_PA_RTC
0113 #define S3C_PA_WDT      S3C64XX_PA_WATCHDOG
0114 #define S3C_PA_SPI0     S3C64XX_PA_SPI0
0115 #define S3C_PA_SPI1     S3C64XX_PA_SPI1
0116 
0117 #define SAMSUNG_PA_ADC      S3C64XX_PA_ADC
0118 #define SAMSUNG_PA_CFCON    S3C64XX_PA_CFCON
0119 #define SAMSUNG_PA_KEYPAD   S3C64XX_PA_KEYPAD
0120 #define SAMSUNG_PA_TIMER    S3C64XX_PA_TIMER
0121 
0122 #endif /* __ASM_ARCH_6400_MAP_H */