arm/mach-s3c/map-base.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright 2003, 2007 Simtec Electronics
0004  *  http://armlinux.simtec.co.uk/
0005  *  Ben Dooks <ben@simtec.co.uk>
0006  *
0007  * S3C - Memory map definitions (virtual addresses)
0008  */
0009
0010 #ifndef __ASM_PLAT_MAP_H
0011 #define __ASM_PLAT_MAP_H __FILE__
0012
0013 /* Fit all our registers in at 0xF6000000 upwards, trying to use as
0014  * little of the VA space as possible so vmalloc and friends have a
0015  * better chance of getting memory.
0016  *
0017  * we try to ensure stuff like the IRQ registers are available for
0018  * an single MOVS instruction (ie, only 8 bits of set data)
0019  */
0020
0021 #define S3C_ADDR_BASE   0xF6000000
0022
0023 #ifndef __ASSEMBLY__
0024 #define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
0025 #else
0026 #define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
0027 #endif
0028
0029 #define S3C_VA_IRQ  S3C_ADDR(0x00000000)    /* irq controller(s) */
0030 #define S3C_VA_SYS  S3C_ADDR(0x00100000)    /* system control */
0031 #define S3C_VA_MEM  S3C_ADDR(0x00200000)    /* memory control */
0032 #define S3C_VA_TIMER    S3C_ADDR(0x00300000)    /* timer block */
0033 #define S3C_VA_WATCHDOG S3C_ADDR(0x00400000)    /* watchdog */
0034 #define S3C_VA_UART S3C_ADDR(0x01000000)    /* UART */
0035
0036 /* ISA device mapping for BAST to use with inb()/outb() on 8-bit I/O.
0037  * 16-bit I/O on BAST now requires driver modifications to manually
0038  * ioremap CS3.
0039  */
0040 #define S3C24XX_VA_ISA_BYTE PCI_IOBASE
0041
0042 /* This is used for the CPU specific mappings that may be needed, so that
0043  * they do not need to directly used S3C_ADDR() and thus make it easier to
0044  * modify the space for mapping.
0045  */
0046 #define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x))
0047
0048 #endif /* __ASM_PLAT_MAP_H */