arm/mach-s3c/mach-vstms.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // (C) 2006 Thomas Gleixner <tglx@linutronix.de>
0004 //
0005 // Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
0006
0007 #include <linux/kernel.h>
0008 #include <linux/types.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/list.h>
0011 #include <linux/timer.h>
0012 #include <linux/init.h>
0013 #include <linux/serial_core.h>
0014 #include <linux/serial_s3c.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/io.h>
0017 #include <linux/mtd/mtd.h>
0018 #include <linux/mtd/rawnand.h>
0019 #include <linux/mtd/nand-ecc-sw-hamming.h>
0020 #include <linux/mtd/partitions.h>
0021 #include <linux/memblock.h>
0022
0023 #include <asm/mach/arch.h>
0024 #include <asm/mach/map.h>
0025 #include <asm/mach/irq.h>
0026
0027 #include <asm/setup.h>
0028 #include <asm/irq.h>
0029 #include <asm/mach-types.h>
0030
0031 #include "regs-gpio.h"
0032 #include "gpio-samsung.h"
0033 #include "gpio-cfg.h"
0034
0035 #include <linux/platform_data/fb-s3c2410.h>
0036
0037 #include <linux/platform_data/i2c-s3c2410.h>
0038 #include <linux/platform_data/mtd-nand-s3c2410.h>
0039
0040 #include "devs.h"
0041 #include "cpu.h"
0042
0043 #include "s3c24xx.h"
0044
0045 static struct map_desc vstms_iodesc[] __initdata = {
0046 };
0047
0048 static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
0049     [0] = {
0050         .hwport      = 0,
0051         .flags       = 0,
0052         .ucon        = 0x3c5,
0053         .ulcon       = 0x03,
0054         .ufcon       = 0x51,
0055     },
0056     [1] = {
0057         .hwport      = 1,
0058         .flags       = 0,
0059         .ucon        = 0x3c5,
0060         .ulcon       = 0x03,
0061         .ufcon       = 0x51,
0062     },
0063     [2] = {
0064         .hwport      = 2,
0065         .flags       = 0,
0066         .ucon        = 0x3c5,
0067         .ulcon       = 0x03,
0068         .ufcon       = 0x51,
0069     }
0070 };
0071
0072 static struct mtd_partition __initdata vstms_nand_part[] = {
0073     [0] = {
0074         .name   = "Boot Agent",
0075         .size   = 0x7C000,
0076         .offset = 0,
0077     },
0078     [1] = {
0079         .name   = "UBoot Config",
0080         .offset = 0x7C000,
0081         .size   = 0x4000,
0082     },
0083     [2] = {
0084         .name   = "Kernel",
0085         .offset = 0x80000,
0086         .size   = 0x200000,
0087     },
0088     [3] = {
0089         .name   = "RFS",
0090         .offset = 0x280000,
0091         .size   = 0x3d80000,
0092     },
0093 };
0094
0095 static struct s3c2410_nand_set __initdata vstms_nand_sets[] = {
0096     [0] = {
0097         .name       = "NAND",
0098         .nr_chips   = 1,
0099         .nr_partitions  = ARRAY_SIZE(vstms_nand_part),
0100         .partitions = vstms_nand_part,
0101     },
0102 };
0103
0104 /* choose a set of timings which should suit most 512Mbit
0105  * chips and beyond.
0106 */
0107
0108 static struct s3c2410_platform_nand __initdata vstms_nand_info = {
0109     .tacls      = 20,
0110     .twrph0     = 60,
0111     .twrph1     = 20,
0112     .nr_sets    = ARRAY_SIZE(vstms_nand_sets),
0113     .sets       = vstms_nand_sets,
0114     .engine_type    = NAND_ECC_ENGINE_TYPE_SOFT,
0115 };
0116
0117 static struct platform_device *vstms_devices[] __initdata = {
0118     &s3c_device_ohci,
0119     &s3c_device_wdt,
0120     &s3c_device_i2c0,
0121     &s3c_device_iis,
0122     &s3c_device_rtc,
0123     &s3c_device_nand,
0124     &s3c2412_device_dma,
0125 };
0126
0127 static void __init vstms_fixup(struct tag *tags, char **cmdline)
0128 {
0129     if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
0130         memblock_add(0x30000000, SZ_64M);
0131     }
0132 }
0133
0134 static void __init vstms_map_io(void)
0135 {
0136     s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
0137     s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
0138     s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
0139 }
0140
0141 static void __init vstms_init_time(void)
0142 {
0143     s3c2412_init_clocks(12000000);
0144     s3c24xx_timer_init();
0145 }
0146
0147 static void __init vstms_init(void)
0148 {
0149     s3c_i2c0_set_platdata(NULL);
0150     s3c_nand_set_platdata(&vstms_nand_info);
0151     /* Configure the I2S pins (GPE0...GPE4) in correct mode */
0152     s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
0153                   S3C_GPIO_PULL_NONE);
0154     platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
0155 }
0156
0157 MACHINE_START(VSTMS, "VSTMS")
0158     .atag_offset    = 0x100,
0159     .nr_irqs    = NR_IRQS_S3C2412,
0160
0161     .fixup      = vstms_fixup,
0162     .init_irq   = s3c2412_init_irq,
0163     .init_machine   = vstms_init,
0164     .map_io     = vstms_map_io,
0165     .init_time  = vstms_init_time,
0166 MACHINE_END