arm/mach-s3c/mach-real6410.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
0004 // Copyright 2008 Openmoko, Inc.
0005 // Copyright 2008 Simtec Electronics
0006 //  Ben Dooks <ben@simtec.co.uk>
0007 //  http://armlinux.simtec.co.uk/
0008
0009 #include <linux/init.h>
0010 #include <linux/interrupt.h>
0011 #include <linux/fb.h>
0012 #include <linux/gpio.h>
0013 #include <linux/kernel.h>
0014 #include <linux/list.h>
0015 #include <linux/dm9000.h>
0016 #include <linux/mtd/mtd.h>
0017 #include <linux/mtd/partitions.h>
0018 #include <linux/platform_device.h>
0019 #include <linux/serial_core.h>
0020 #include <linux/serial_s3c.h>
0021 #include <linux/types.h>
0022
0023 #include <asm/mach-types.h>
0024 #include <asm/mach/arch.h>
0025 #include <asm/mach/map.h>
0026
0027 #include "map.h"
0028 #include "regs-gpio.h"
0029 #include "gpio-samsung.h"
0030 #include "irqs.h"
0031
0032 #include <linux/soc/samsung/s3c-adc.h>
0033 #include "cpu.h"
0034 #include "devs.h"
0035 #include "fb.h"
0036 #include <linux/platform_data/mtd-nand-s3c2410.h>
0037 #include <linux/platform_data/touchscreen-s3c2410.h>
0038
0039 #include <video/platform_lcd.h>
0040 #include <video/samsung_fimd.h>
0041
0042 #include "s3c64xx.h"
0043 #include "regs-modem-s3c64xx.h"
0044 #include "regs-srom-s3c64xx.h"
0045
0046 #define UCON S3C2410_UCON_DEFAULT
0047 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
0048 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
0049
0050 static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
0051     [0] = {
0052         .hwport = 0,
0053         .flags  = 0,
0054         .ucon   = UCON,
0055         .ulcon  = ULCON,
0056         .ufcon  = UFCON,
0057     },
0058     [1] = {
0059         .hwport = 1,
0060         .flags  = 0,
0061         .ucon   = UCON,
0062         .ulcon  = ULCON,
0063         .ufcon  = UFCON,
0064     },
0065     [2] = {
0066         .hwport = 2,
0067         .flags  = 0,
0068         .ucon   = UCON,
0069         .ulcon  = ULCON,
0070         .ufcon  = UFCON,
0071     },
0072     [3] = {
0073         .hwport = 3,
0074         .flags  = 0,
0075         .ucon   = UCON,
0076         .ulcon  = ULCON,
0077         .ufcon  = UFCON,
0078     },
0079 };
0080
0081 /* DM9000AEP 10/100 ethernet controller */
0082
0083 static struct resource real6410_dm9k_resource[] = {
0084     [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
0085     [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
0086     [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
0087                     | IORESOURCE_IRQ_HIGHLEVEL),
0088 };
0089
0090 static struct dm9000_plat_data real6410_dm9k_pdata = {
0091     .flags      = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
0092 };
0093
0094 static struct platform_device real6410_device_eth = {
0095     .name       = "dm9000",
0096     .id     = -1,
0097     .num_resources  = ARRAY_SIZE(real6410_dm9k_resource),
0098     .resource   = real6410_dm9k_resource,
0099     .dev        = {
0100         .platform_data  = &real6410_dm9k_pdata,
0101     },
0102 };
0103
0104 static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = {
0105     .max_bpp    = 32,
0106     .default_bpp    = 16,
0107     .xres       = 480,
0108     .yres       = 272,
0109 };
0110
0111 static struct fb_videomode real6410_lcd_type0_timing = {
0112     /* 4.3" 480x272 */
0113     .left_margin    = 3,
0114     .right_margin   = 2,
0115     .upper_margin   = 1,
0116     .lower_margin   = 1,
0117     .hsync_len  = 40,
0118     .vsync_len  = 1,
0119 };
0120
0121 static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = {
0122     .max_bpp    = 32,
0123     .default_bpp    = 16,
0124     .xres       = 800,
0125     .yres       = 480,
0126 };
0127
0128 static struct fb_videomode real6410_lcd_type1_timing = {
0129     /* 7.0" 800x480 */
0130     .left_margin    = 8,
0131     .right_margin   = 13,
0132     .upper_margin   = 7,
0133     .lower_margin   = 5,
0134     .hsync_len  = 3,
0135     .vsync_len  = 1,
0136     .xres       = 800,
0137     .yres       = 480,
0138 };
0139
0140 static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = {
0141     {
0142         .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
0143         .vtiming    = &real6410_lcd_type0_timing,
0144         .win[0]     = &real6410_lcd_type0_fb_win,
0145         .vidcon0    = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
0146         .vidcon1    = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
0147     }, {
0148         .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
0149         .vtiming    = &real6410_lcd_type1_timing,
0150         .win[0]     = &real6410_lcd_type1_fb_win,
0151         .vidcon0    = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
0152         .vidcon1    = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
0153     },
0154     { },
0155 };
0156
0157 static struct mtd_partition real6410_nand_part[] = {
0158     [0] = {
0159         .name   = "uboot",
0160         .size   = SZ_1M,
0161         .offset = 0,
0162     },
0163     [1] = {
0164         .name   = "kernel",
0165         .size   = SZ_2M,
0166         .offset = SZ_1M,
0167     },
0168     [2] = {
0169         .name   = "rootfs",
0170         .size   = MTDPART_SIZ_FULL,
0171         .offset = SZ_1M + SZ_2M,
0172     },
0173 };
0174
0175 static struct s3c2410_nand_set real6410_nand_sets[] = {
0176     [0] = {
0177         .name       = "nand",
0178         .nr_chips   = 1,
0179         .nr_partitions  = ARRAY_SIZE(real6410_nand_part),
0180         .partitions = real6410_nand_part,
0181     },
0182 };
0183
0184 static struct s3c2410_platform_nand real6410_nand_info = {
0185     .tacls      = 25,
0186     .twrph0     = 55,
0187     .twrph1     = 40,
0188     .nr_sets    = ARRAY_SIZE(real6410_nand_sets),
0189     .sets       = real6410_nand_sets,
0190     .engine_type    = NAND_ECC_ENGINE_TYPE_SOFT,
0191 };
0192
0193 static struct platform_device *real6410_devices[] __initdata = {
0194     &real6410_device_eth,
0195     &s3c_device_hsmmc0,
0196     &s3c_device_hsmmc1,
0197     &s3c_device_fb,
0198     &s3c_device_nand,
0199     &s3c_device_adc,
0200     &s3c_device_ohci,
0201 };
0202
0203 static void __init real6410_map_io(void)
0204 {
0205     u32 tmp;
0206
0207     s3c64xx_init_io(NULL, 0);
0208     s3c24xx_init_clocks(12000000);
0209     s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
0210     s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4);
0211
0212     /* set the LCD type */
0213     tmp = __raw_readl(S3C64XX_SPCON);
0214     tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
0215     tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
0216     __raw_writel(tmp, S3C64XX_SPCON);
0217
0218     /* remove the LCD bypass */
0219     tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
0220     tmp &= ~MIFPCON_LCD_BYPASS;
0221     __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
0222 }
0223
0224 /*
0225  * real6410_features string
0226  *
0227  * 0-9 LCD configuration
0228  *
0229  */
0230 static char real6410_features_str[12] __initdata = "0";
0231
0232 static int __init real6410_features_setup(char *str)
0233 {
0234     if (str)
0235         strlcpy(real6410_features_str, str,
0236             sizeof(real6410_features_str));
0237     return 1;
0238 }
0239
0240 __setup("real6410=", real6410_features_setup);
0241
0242 #define FEATURE_SCREEN (1 << 0)
0243
0244 struct real6410_features_t {
0245     int done;
0246     int lcd_index;
0247 };
0248
0249 static void real6410_parse_features(
0250         struct real6410_features_t *features,
0251         const char *features_str)
0252 {
0253     const char *fp = features_str;
0254
0255     features->done = 0;
0256     features->lcd_index = 0;
0257
0258     while (*fp) {
0259         char f = *fp++;
0260
0261         switch (f) {
0262         case '0'...'9': /* tft screen */
0263             if (features->done & FEATURE_SCREEN) {
0264                 printk(KERN_INFO "REAL6410: '%c' ignored, "
0265                     "screen type already set\n", f);
0266             } else {
0267                 int li = f - '0';
0268                 if (li >= ARRAY_SIZE(real6410_lcd_pdata))
0269                     printk(KERN_INFO "REAL6410: '%c' out "
0270                         "of range LCD mode\n", f);
0271                 else {
0272                     features->lcd_index = li;
0273                 }
0274             }
0275             features->done |= FEATURE_SCREEN;
0276             break;
0277         }
0278     }
0279 }
0280
0281 static void __init real6410_machine_init(void)
0282 {
0283     u32 cs1;
0284     struct real6410_features_t features = { 0 };
0285
0286     printk(KERN_INFO "REAL6410: Option string real6410=%s\n",
0287             real6410_features_str);
0288
0289     /* Parse the feature string */
0290     real6410_parse_features(&features, real6410_features_str);
0291
0292     printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
0293         real6410_lcd_pdata[features.lcd_index].win[0]->xres,
0294         real6410_lcd_pdata[features.lcd_index].win[0]->yres);
0295
0296     s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]);
0297     s3c_nand_set_platdata(&real6410_nand_info);
0298     s3c64xx_ts_set_platdata(NULL);
0299
0300     /* configure nCS1 width to 16 bits */
0301
0302     cs1 = __raw_readl(S3C64XX_SROM_BW) &
0303         ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
0304     cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
0305         (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
0306         (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
0307             S3C64XX_SROM_BW__NCS1__SHIFT;
0308     __raw_writel(cs1, S3C64XX_SROM_BW);
0309
0310     /* set timing for nCS1 suitable for ethernet chip */
0311
0312     __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
0313         (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
0314         (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
0315         (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
0316         (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
0317         (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
0318         (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
0319
0320     gpio_request(S3C64XX_GPF(15), "LCD power");
0321
0322     platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
0323 }
0324
0325 MACHINE_START(REAL6410, "REAL6410")
0326     /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
0327     .atag_offset    = 0x100,
0328     .nr_irqs    = S3C64XX_NR_IRQS,
0329     .init_irq   = s3c6410_init_irq,
0330     .map_io     = real6410_map_io,
0331     .init_machine   = real6410_machine_init,
0332     .init_time  = s3c64xx_timer_init,
0333 MACHINE_END