arm/mach-s3c/mach-osiris.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright (c) 2005-2008 Simtec Electronics
0004 //  http://armlinux.simtec.co.uk/
0005 //  Ben Dooks <ben@simtec.co.uk>
0006
0007 #include <linux/kernel.h>
0008 #include <linux/types.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/list.h>
0011 #include <linux/timer.h>
0012 #include <linux/init.h>
0013 #include <linux/gpio.h>
0014 #include <linux/device.h>
0015 #include <linux/syscore_ops.h>
0016 #include <linux/serial_core.h>
0017 #include <linux/serial_s3c.h>
0018 #include <linux/clk.h>
0019 #include <linux/i2c.h>
0020 #include <linux/io.h>
0021 #include <linux/platform_device.h>
0022
0023 #include <linux/mfd/tps65010.h>
0024
0025 #include <asm/mach-types.h>
0026 #include <asm/mach/arch.h>
0027 #include <asm/mach/map.h>
0028 #include <asm/mach/irq.h>
0029 #include <asm/irq.h>
0030
0031 #include <linux/platform_data/mtd-nand-s3c2410.h>
0032 #include <linux/platform_data/i2c-s3c2410.h>
0033
0034 #include <linux/mtd/mtd.h>
0035 #include <linux/mtd/rawnand.h>
0036 #include <linux/mtd/nand-ecc-sw-hamming.h>
0037 #include <linux/mtd/partitions.h>
0038
0039 #include "cpu.h"
0040 #include <linux/soc/samsung/s3c-cpu-freq.h>
0041 #include "devs.h"
0042 #include "gpio-cfg.h"
0043
0044 #include "regs-gpio.h"
0045 #include "gpio-samsung.h"
0046
0047 #include "s3c24xx.h"
0048 #include "osiris.h"
0049 #include "regs-mem-s3c24xx.h"
0050
0051 /* onboard perihperal map */
0052
0053 static struct map_desc osiris_iodesc[] __initdata = {
0054   /* ISA IO areas (may be over-written later) */
0055
0056   {
0057       .virtual  = (u32)S3C24XX_VA_ISA_BYTE,
0058       .pfn      = __phys_to_pfn(S3C2410_CS5),
0059       .length   = SZ_16M,
0060       .type     = MT_DEVICE,
0061   },
0062
0063   /* CPLD control registers */
0064
0065   {
0066       .virtual  = (u32)OSIRIS_VA_CTRL0,
0067       .pfn      = __phys_to_pfn(OSIRIS_PA_CTRL0),
0068       .length   = SZ_16K,
0069       .type     = MT_DEVICE,
0070   }, {
0071       .virtual  = (u32)OSIRIS_VA_CTRL1,
0072       .pfn      = __phys_to_pfn(OSIRIS_PA_CTRL1),
0073       .length   = SZ_16K,
0074       .type     = MT_DEVICE,
0075   }, {
0076       .virtual  = (u32)OSIRIS_VA_CTRL2,
0077       .pfn      = __phys_to_pfn(OSIRIS_PA_CTRL2),
0078       .length   = SZ_16K,
0079       .type     = MT_DEVICE,
0080   }, {
0081       .virtual  = (u32)OSIRIS_VA_IDREG,
0082       .pfn      = __phys_to_pfn(OSIRIS_PA_IDREG),
0083       .length   = SZ_16K,
0084       .type     = MT_DEVICE,
0085   },
0086 };
0087
0088 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
0089 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
0090 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
0091
0092 static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
0093     [0] = {
0094         .hwport      = 0,
0095         .flags       = 0,
0096         .ucon        = UCON,
0097         .ulcon       = ULCON,
0098         .ufcon       = UFCON,
0099         .clk_sel    = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
0100     },
0101     [1] = {
0102         .hwport      = 1,
0103         .flags       = 0,
0104         .ucon        = UCON,
0105         .ulcon       = ULCON,
0106         .ufcon       = UFCON,
0107         .clk_sel    = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
0108     },
0109     [2] = {
0110         .hwport      = 2,
0111         .flags       = 0,
0112         .ucon        = UCON,
0113         .ulcon       = ULCON,
0114         .ufcon       = UFCON,
0115         .clk_sel    = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
0116     }
0117 };
0118
0119 /* NAND Flash on Osiris board */
0120
0121 static int external_map[]   = { 2 };
0122 static int chip0_map[]      = { 0 };
0123 static int chip1_map[]      = { 1 };
0124
0125 static struct mtd_partition __initdata osiris_default_nand_part[] = {
0126     [0] = {
0127         .name   = "Boot Agent",
0128         .size   = SZ_16K,
0129         .offset = 0,
0130     },
0131     [1] = {
0132         .name   = "/boot",
0133         .size   = SZ_4M - SZ_16K,
0134         .offset = SZ_16K,
0135     },
0136     [2] = {
0137         .name   = "user1",
0138         .offset = SZ_4M,
0139         .size   = SZ_32M - SZ_4M,
0140     },
0141     [3] = {
0142         .name   = "user2",
0143         .offset = SZ_32M,
0144         .size   = MTDPART_SIZ_FULL,
0145     }
0146 };
0147
0148 static struct mtd_partition __initdata osiris_default_nand_part_large[] = {
0149     [0] = {
0150         .name   = "Boot Agent",
0151         .size   = SZ_128K,
0152         .offset = 0,
0153     },
0154     [1] = {
0155         .name   = "/boot",
0156         .size   = SZ_4M - SZ_128K,
0157         .offset = SZ_128K,
0158     },
0159     [2] = {
0160         .name   = "user1",
0161         .offset = SZ_4M,
0162         .size   = SZ_32M - SZ_4M,
0163     },
0164     [3] = {
0165         .name   = "user2",
0166         .offset = SZ_32M,
0167         .size   = MTDPART_SIZ_FULL,
0168     }
0169 };
0170
0171 /* the Osiris has 3 selectable slots for nand-flash, the two
0172  * on-board chip areas, as well as the external slot.
0173  *
0174  * Note, there is no current hot-plug support for the External
0175  * socket.
0176 */
0177
0178 static struct s3c2410_nand_set __initdata osiris_nand_sets[] = {
0179     [1] = {
0180         .name       = "External",
0181         .nr_chips   = 1,
0182         .nr_map     = external_map,
0183         .options    = NAND_SCAN_SILENT_NODEV,
0184         .nr_partitions  = ARRAY_SIZE(osiris_default_nand_part),
0185         .partitions = osiris_default_nand_part,
0186     },
0187     [0] = {
0188         .name       = "chip0",
0189         .nr_chips   = 1,
0190         .nr_map     = chip0_map,
0191         .nr_partitions  = ARRAY_SIZE(osiris_default_nand_part),
0192         .partitions = osiris_default_nand_part,
0193     },
0194     [2] = {
0195         .name       = "chip1",
0196         .nr_chips   = 1,
0197         .nr_map     = chip1_map,
0198         .options    = NAND_SCAN_SILENT_NODEV,
0199         .nr_partitions  = ARRAY_SIZE(osiris_default_nand_part),
0200         .partitions = osiris_default_nand_part,
0201     },
0202 };
0203
0204 static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
0205 {
0206     unsigned int tmp;
0207
0208     slot = set->nr_map[slot] & 3;
0209
0210     pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
0211          slot, set, set->nr_map);
0212
0213     tmp = __raw_readb(OSIRIS_VA_CTRL0);
0214     tmp &= ~OSIRIS_CTRL0_NANDSEL;
0215     tmp |= slot;
0216
0217     pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
0218
0219     __raw_writeb(tmp, OSIRIS_VA_CTRL0);
0220 }
0221
0222 static struct s3c2410_platform_nand __initdata osiris_nand_info = {
0223     .tacls      = 25,
0224     .twrph0     = 60,
0225     .twrph1     = 60,
0226     .nr_sets    = ARRAY_SIZE(osiris_nand_sets),
0227     .sets       = osiris_nand_sets,
0228     .select_chip    = osiris_nand_select,
0229     .engine_type    = NAND_ECC_ENGINE_TYPE_SOFT,
0230 };
0231
0232 /* PCMCIA control and configuration */
0233
0234 static struct resource osiris_pcmcia_resource[] = {
0235     [0] = DEFINE_RES_MEM(0x0f000000, SZ_1M),
0236     [1] = DEFINE_RES_MEM(0x0c000000, SZ_1M),
0237 };
0238
0239 static struct platform_device osiris_pcmcia = {
0240     .name       = "osiris-pcmcia",
0241     .id     = -1,
0242     .num_resources  = ARRAY_SIZE(osiris_pcmcia_resource),
0243     .resource   = osiris_pcmcia_resource,
0244 };
0245
0246 /* Osiris power management device */
0247
0248 #ifdef CONFIG_PM
0249 static unsigned char pm_osiris_ctrl0;
0250
0251 static int osiris_pm_suspend(void)
0252 {
0253     unsigned int tmp;
0254
0255     pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
0256     tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL;
0257
0258     /* ensure correct NAND slot is selected on resume */
0259     if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0)
0260             tmp |= 2;
0261
0262     __raw_writeb(tmp, OSIRIS_VA_CTRL0);
0263
0264     /* ensure that an nRESET is not generated on resume. */
0265     gpio_request_one(S3C2410_GPA(21), GPIOF_OUT_INIT_HIGH, NULL);
0266     gpio_free(S3C2410_GPA(21));
0267
0268     return 0;
0269 }
0270
0271 static void osiris_pm_resume(void)
0272 {
0273     if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
0274         __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
0275
0276     __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
0277
0278     s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
0279 }
0280
0281 #else
0282 #define osiris_pm_suspend NULL
0283 #define osiris_pm_resume NULL
0284 #endif
0285
0286 static struct syscore_ops osiris_pm_syscore_ops = {
0287     .suspend    = osiris_pm_suspend,
0288     .resume     = osiris_pm_resume,
0289 };
0290
0291 /* Link for DVS driver to TPS65011 */
0292
0293 static void osiris_tps_release(struct device *dev)
0294 {
0295     /* static device, do not need to release anything */
0296 }
0297
0298 static struct platform_device osiris_tps_device = {
0299     .name   = "osiris-dvs",
0300     .id = -1,
0301     .dev.release = osiris_tps_release,
0302 };
0303
0304 static int osiris_tps_setup(struct i2c_client *client, void *context)
0305 {
0306     osiris_tps_device.dev.parent = &client->dev;
0307     return platform_device_register(&osiris_tps_device);
0308 }
0309
0310 static int osiris_tps_remove(struct i2c_client *client, void *context)
0311 {
0312     platform_device_unregister(&osiris_tps_device);
0313     return 0;
0314 }
0315
0316 static struct tps65010_board osiris_tps_board = {
0317     .base       = -1,   /* GPIO can go anywhere at the moment */
0318     .setup      = osiris_tps_setup,
0319     .teardown   = osiris_tps_remove,
0320 };
0321
0322 /* I2C devices fitted. */
0323
0324 static struct i2c_board_info osiris_i2c_devs[] __initdata = {
0325     {
0326         I2C_BOARD_INFO("tps65011", 0x48),
0327         .irq    = IRQ_EINT20,
0328         .platform_data = &osiris_tps_board,
0329     },
0330 };
0331
0332 /* Standard Osiris devices */
0333
0334 static struct platform_device *osiris_devices[] __initdata = {
0335     &s3c2410_device_dclk,
0336     &s3c_device_i2c0,
0337     &s3c_device_wdt,
0338     &s3c_device_nand,
0339     &osiris_pcmcia,
0340 };
0341
0342 static struct s3c_cpufreq_board __initdata osiris_cpufreq = {
0343     .refresh    = 7800, /* refresh period is 7.8usec */
0344     .auto_io    = 1,
0345     .need_io    = 1,
0346 };
0347
0348 static void __init osiris_map_io(void)
0349 {
0350     unsigned long flags;
0351
0352     s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc));
0353     s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
0354     s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
0355
0356     /* check for the newer revision boards with large page nand */
0357
0358     if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) {
0359         printk(KERN_INFO "OSIRIS-B detected (revision %d)\n",
0360                __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK);
0361         osiris_nand_sets[0].partitions = osiris_default_nand_part_large;
0362         osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large);
0363     } else {
0364         /* write-protect line to the NAND */
0365         gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL);
0366         gpio_free(S3C2410_GPA(0));
0367     }
0368
0369     /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
0370
0371     local_irq_save(flags);
0372     __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
0373     local_irq_restore(flags);
0374 }
0375
0376 static void __init osiris_init_time(void)
0377 {
0378     s3c2440_init_clocks(12000000);
0379     s3c24xx_timer_init();
0380 }
0381
0382 static void __init osiris_init(void)
0383 {
0384     register_syscore_ops(&osiris_pm_syscore_ops);
0385
0386     s3c_i2c0_set_platdata(NULL);
0387     s3c_nand_set_platdata(&osiris_nand_info);
0388
0389     s3c_cpufreq_setboard(&osiris_cpufreq);
0390
0391     i2c_register_board_info(0, osiris_i2c_devs,
0392                 ARRAY_SIZE(osiris_i2c_devs));
0393
0394     platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
0395 };
0396
0397 MACHINE_START(OSIRIS, "Simtec-OSIRIS")
0398     /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
0399     .atag_offset    = 0x100,
0400     .nr_irqs    = NR_IRQS_S3C2440,
0401     .map_io     = osiris_map_io,
0402     .init_irq   = s3c2440_init_irq,
0403     .init_machine   = osiris_init,
0404     .init_time  = osiris_init_time,
0405 MACHINE_END