arm/mach-s3c/mach-at2440evb.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
0004 //      Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
0005 //      and modifications by SBZ <sbz@spgui.org> and
0006 //      Weibing <http://weibing.blogbus.com>
0007 //
0008 // For product information, visit http://www.arm.com/
0009
0010 #include <linux/kernel.h>
0011 #include <linux/types.h>
0012 #include <linux/gpio/machine.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/list.h>
0015 #include <linux/timer.h>
0016 #include <linux/init.h>
0017 #include <linux/io.h>
0018 #include <linux/serial_core.h>
0019 #include <linux/serial_s3c.h>
0020 #include <linux/dm9000.h>
0021 #include <linux/platform_device.h>
0022
0023 #include <asm/mach/arch.h>
0024 #include <asm/mach/map.h>
0025 #include <asm/mach/irq.h>
0026
0027 #include <linux/platform_data/fb-s3c2410.h>
0028 #include <asm/irq.h>
0029 #include <asm/mach-types.h>
0030
0031 #include "regs-gpio.h"
0032 #include "gpio-samsung.h"
0033 #include <linux/platform_data/mtd-nand-s3c2410.h>
0034 #include <linux/platform_data/i2c-s3c2410.h>
0035
0036 #include <linux/mtd/mtd.h>
0037 #include <linux/mtd/rawnand.h>
0038 #include <linux/mtd/nand-ecc-sw-hamming.h>
0039 #include <linux/mtd/partitions.h>
0040
0041 #include "devs.h"
0042 #include "cpu.h"
0043 #include <linux/platform_data/mmc-s3cmci.h>
0044
0045 #include "s3c24xx.h"
0046
0047 static struct map_desc at2440evb_iodesc[] __initdata = {
0048     /* Nothing here */
0049 };
0050
0051 #define UCON S3C2410_UCON_DEFAULT
0052 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
0053 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
0054
0055 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
0056     [0] = {
0057         .hwport      = 0,
0058         .flags       = 0,
0059         .ucon        = UCON,
0060         .ulcon       = ULCON,
0061         .ufcon       = UFCON,
0062         .clk_sel    = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
0063     },
0064     [1] = {
0065         .hwport      = 1,
0066         .flags       = 0,
0067         .ucon        = UCON,
0068         .ulcon       = ULCON,
0069         .ufcon       = UFCON,
0070         .clk_sel    = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
0071     },
0072 };
0073
0074 /* NAND Flash on AT2440EVB board */
0075
0076 static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
0077     [0] = {
0078         .name   = "Boot Agent",
0079         .size   = SZ_256K,
0080         .offset = 0,
0081     },
0082     [1] = {
0083         .name   = "Kernel",
0084         .size   = SZ_2M,
0085         .offset = SZ_256K,
0086     },
0087     [2] = {
0088         .name   = "Root",
0089         .offset = SZ_256K + SZ_2M,
0090         .size   = MTDPART_SIZ_FULL,
0091     },
0092 };
0093
0094 static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
0095     [0] = {
0096         .name       = "nand",
0097         .nr_chips   = 1,
0098         .nr_partitions  = ARRAY_SIZE(at2440evb_default_nand_part),
0099         .partitions = at2440evb_default_nand_part,
0100     },
0101 };
0102
0103 static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
0104     .tacls      = 25,
0105     .twrph0     = 55,
0106     .twrph1     = 40,
0107     .nr_sets    = ARRAY_SIZE(at2440evb_nand_sets),
0108     .sets       = at2440evb_nand_sets,
0109     .engine_type    = NAND_ECC_ENGINE_TYPE_SOFT,
0110 };
0111
0112 /* DM9000AEP 10/100 ethernet controller */
0113
0114 static struct resource at2440evb_dm9k_resource[] = {
0115     [0] = DEFINE_RES_MEM(S3C2410_CS3, 4),
0116     [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
0117     [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
0118                     | IORESOURCE_IRQ_HIGHEDGE),
0119 };
0120
0121 static struct dm9000_plat_data at2440evb_dm9k_pdata = {
0122     .flags      = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
0123 };
0124
0125 static struct platform_device at2440evb_device_eth = {
0126     .name       = "dm9000",
0127     .id     = -1,
0128     .num_resources  = ARRAY_SIZE(at2440evb_dm9k_resource),
0129     .resource   = at2440evb_dm9k_resource,
0130     .dev        = {
0131         .platform_data  = &at2440evb_dm9k_pdata,
0132     },
0133 };
0134
0135 static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
0136     .set_power  = s3c24xx_mci_def_set_power,
0137 };
0138
0139 static struct gpiod_lookup_table at2440evb_mci_gpio_table = {
0140     .dev_id = "s3c2410-sdi",
0141     .table = {
0142         /* Card detect S3C2410_GPG(10) */
0143         GPIO_LOOKUP("GPIOG", 10, "cd", GPIO_ACTIVE_LOW),
0144         /* bus pins */
0145         GPIO_LOOKUP_IDX("GPIOE",  5, "bus", 0, GPIO_ACTIVE_HIGH),
0146         GPIO_LOOKUP_IDX("GPIOE",  6, "bus", 1, GPIO_ACTIVE_HIGH),
0147         GPIO_LOOKUP_IDX("GPIOE",  7, "bus", 2, GPIO_ACTIVE_HIGH),
0148         GPIO_LOOKUP_IDX("GPIOE",  8, "bus", 3, GPIO_ACTIVE_HIGH),
0149         GPIO_LOOKUP_IDX("GPIOE",  9, "bus", 4, GPIO_ACTIVE_HIGH),
0150         GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH),
0151         { },
0152     },
0153 };
0154
0155
0156 /* 7" LCD panel */
0157
0158 static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
0159
0160     .lcdcon5    = S3C2410_LCDCON5_FRM565 |
0161               S3C2410_LCDCON5_INVVLINE |
0162               S3C2410_LCDCON5_INVVFRAME |
0163               S3C2410_LCDCON5_PWREN |
0164               S3C2410_LCDCON5_HWSWP,
0165
0166     .type       = S3C2410_LCDCON1_TFT,
0167
0168     .width      = 800,
0169     .height     = 480,
0170
0171     .pixclock   = 33333, /* HCLK 60 MHz, divisor 2 */
0172     .xres       = 800,
0173     .yres       = 480,
0174     .bpp        = 16,
0175     .left_margin    = 88,
0176     .right_margin   = 40,
0177     .hsync_len  = 128,
0178     .upper_margin   = 32,
0179     .lower_margin   = 11,
0180     .vsync_len  = 2,
0181 };
0182
0183 static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
0184     .displays   = &at2440evb_lcd_cfg,
0185     .num_displays   = 1,
0186     .default_display = 0,
0187 };
0188
0189 static struct platform_device *at2440evb_devices[] __initdata = {
0190     &s3c_device_ohci,
0191     &s3c_device_wdt,
0192     &s3c_device_adc,
0193     &s3c_device_i2c0,
0194     &s3c_device_rtc,
0195     &s3c_device_nand,
0196     &s3c_device_sdi,
0197     &s3c_device_lcd,
0198     &at2440evb_device_eth,
0199 };
0200
0201 static void __init at2440evb_map_io(void)
0202 {
0203     s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
0204     s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
0205     s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
0206 }
0207
0208 static void __init at2440evb_init_time(void)
0209 {
0210     s3c2440_init_clocks(16934400);
0211     s3c24xx_timer_init();
0212 }
0213
0214 static void __init at2440evb_init(void)
0215 {
0216     s3c24xx_fb_set_platdata(&at2440evb_fb_info);
0217     gpiod_add_lookup_table(&at2440evb_mci_gpio_table);
0218     s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
0219     s3c_nand_set_platdata(&at2440evb_nand_info);
0220     s3c_i2c0_set_platdata(NULL);
0221
0222     platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
0223 }
0224
0225
0226 MACHINE_START(AT2440EVB, "AT2440EVB")
0227     .atag_offset    = 0x100,
0228     .nr_irqs    = NR_IRQS_S3C2440,
0229     .map_io     = at2440evb_map_io,
0230     .init_machine   = at2440evb_init,
0231     .init_irq   = s3c2440_init_irq,
0232     .init_time  = at2440evb_init_time,
0233 MACHINE_END