arm/mach-s3c/mach-anubis.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 //
0003 // Copyright 2003-2009 Simtec Electronics
0004 //  http://armlinux.simtec.co.uk/
0005 //  Ben Dooks <ben@simtec.co.uk>
0006
0007 #include <linux/kernel.h>
0008 #include <linux/types.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/list.h>
0011 #include <linux/timer.h>
0012 #include <linux/init.h>
0013 #include <linux/gpio.h>
0014 #include <linux/serial_core.h>
0015 #include <linux/serial_s3c.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/ata_platform.h>
0018 #include <linux/i2c.h>
0019 #include <linux/io.h>
0020 #include <linux/sm501.h>
0021 #include <linux/sm501-regs.h>
0022
0023 #include <asm/mach/arch.h>
0024 #include <asm/mach/map.h>
0025 #include <asm/mach/irq.h>
0026
0027 #include <asm/irq.h>
0028 #include <asm/mach-types.h>
0029
0030 #include "regs-gpio.h"
0031 #include "gpio-samsung.h"
0032 #include <linux/platform_data/mtd-nand-s3c2410.h>
0033 #include <linux/platform_data/i2c-s3c2410.h>
0034
0035 #include <linux/mtd/mtd.h>
0036 #include <linux/mtd/rawnand.h>
0037 #include <linux/mtd/nand-ecc-sw-hamming.h>
0038 #include <linux/mtd/partitions.h>
0039
0040 #include <net/ax88796.h>
0041
0042 #include "devs.h"
0043 #include "cpu.h"
0044 #include <linux/platform_data/asoc-s3c24xx_simtec.h>
0045
0046 #include "anubis.h"
0047 #include "s3c24xx.h"
0048 #include "simtec.h"
0049
0050 #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
0051
0052 static struct map_desc anubis_iodesc[] __initdata = {
0053   /* ISA IO areas */
0054
0055   {
0056     .virtual    = (u32)S3C24XX_VA_ISA_BYTE,
0057     .pfn        = __phys_to_pfn(0x0),
0058     .length     = SZ_4M,
0059     .type       = MT_DEVICE,
0060   },
0061
0062   /* we could possibly compress the next set down into a set of smaller tables
0063    * pagetables, but that would mean using an L2 section, and it still means
0064    * we cannot actually feed the same register to an LDR due to 16K spacing
0065    */
0066
0067   /* CPLD control registers */
0068
0069   {
0070     .virtual    = (u32)ANUBIS_VA_CTRL1,
0071     .pfn        = __phys_to_pfn(ANUBIS_PA_CTRL1),
0072     .length     = SZ_4K,
0073     .type       = MT_DEVICE,
0074   }, {
0075     .virtual    = (u32)ANUBIS_VA_IDREG,
0076     .pfn        = __phys_to_pfn(ANUBIS_PA_IDREG),
0077     .length     = SZ_4K,
0078     .type       = MT_DEVICE,
0079   },
0080 };
0081
0082 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
0083 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
0084 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
0085
0086 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
0087     [0] = {
0088         .hwport      = 0,
0089         .flags       = 0,
0090         .ucon        = UCON,
0091         .ulcon       = ULCON,
0092         .ufcon       = UFCON,
0093         .clk_sel    = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
0094     },
0095     [1] = {
0096         .hwport      = 2,
0097         .flags       = 0,
0098         .ucon        = UCON,
0099         .ulcon       = ULCON,
0100         .ufcon       = UFCON,
0101         .clk_sel    = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
0102     },
0103 };
0104
0105 /* NAND Flash on Anubis board */
0106
0107 static int external_map[]   = { 2 };
0108 static int chip0_map[]      = { 0 };
0109 static int chip1_map[]      = { 1 };
0110
0111 static struct mtd_partition __initdata anubis_default_nand_part[] = {
0112     [0] = {
0113         .name   = "Boot Agent",
0114         .size   = SZ_16K,
0115         .offset = 0,
0116     },
0117     [1] = {
0118         .name   = "/boot",
0119         .size   = SZ_4M - SZ_16K,
0120         .offset = SZ_16K,
0121     },
0122     [2] = {
0123         .name   = "user1",
0124         .offset = SZ_4M,
0125         .size   = SZ_32M - SZ_4M,
0126     },
0127     [3] = {
0128         .name   = "user2",
0129         .offset = SZ_32M,
0130         .size   = MTDPART_SIZ_FULL,
0131     }
0132 };
0133
0134 static struct mtd_partition __initdata anubis_default_nand_part_large[] = {
0135     [0] = {
0136         .name   = "Boot Agent",
0137         .size   = SZ_128K,
0138         .offset = 0,
0139     },
0140     [1] = {
0141         .name   = "/boot",
0142         .size   = SZ_4M - SZ_128K,
0143         .offset = SZ_128K,
0144     },
0145     [2] = {
0146         .name   = "user1",
0147         .offset = SZ_4M,
0148         .size   = SZ_32M - SZ_4M,
0149     },
0150     [3] = {
0151         .name   = "user2",
0152         .offset = SZ_32M,
0153         .size   = MTDPART_SIZ_FULL,
0154     }
0155 };
0156
0157 /* the Anubis has 3 selectable slots for nand-flash, the two
0158  * on-board chip areas, as well as the external slot.
0159  *
0160  * Note, there is no current hot-plug support for the External
0161  * socket.
0162 */
0163
0164 static struct s3c2410_nand_set __initdata anubis_nand_sets[] = {
0165     [1] = {
0166         .name       = "External",
0167         .nr_chips   = 1,
0168         .nr_map     = external_map,
0169         .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
0170         .partitions = anubis_default_nand_part,
0171     },
0172     [0] = {
0173         .name       = "chip0",
0174         .nr_chips   = 1,
0175         .nr_map     = chip0_map,
0176         .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
0177         .partitions = anubis_default_nand_part,
0178     },
0179     [2] = {
0180         .name       = "chip1",
0181         .nr_chips   = 1,
0182         .nr_map     = chip1_map,
0183         .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
0184         .partitions = anubis_default_nand_part,
0185     },
0186 };
0187
0188 static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
0189 {
0190     unsigned int tmp;
0191
0192     slot = set->nr_map[slot] & 3;
0193
0194     pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n",
0195          slot, set, set->nr_map);
0196
0197     tmp = __raw_readb(ANUBIS_VA_CTRL1);
0198     tmp &= ~ANUBIS_CTRL1_NANDSEL;
0199     tmp |= slot;
0200
0201     pr_debug("anubis_nand: ctrl1 now %02x\n", tmp);
0202
0203     __raw_writeb(tmp, ANUBIS_VA_CTRL1);
0204 }
0205
0206 static struct s3c2410_platform_nand __initdata anubis_nand_info = {
0207     .tacls      = 25,
0208     .twrph0     = 55,
0209     .twrph1     = 40,
0210     .nr_sets    = ARRAY_SIZE(anubis_nand_sets),
0211     .sets       = anubis_nand_sets,
0212     .select_chip    = anubis_nand_select,
0213     .engine_type    = NAND_ECC_ENGINE_TYPE_SOFT,
0214 };
0215
0216 /* IDE channels */
0217
0218 static struct pata_platform_info anubis_ide_platdata = {
0219     .ioport_shift   = 5,
0220 };
0221
0222 static struct resource anubis_ide0_resource[] = {
0223     [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),
0224     [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32),
0225     [3] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
0226 };
0227
0228 static struct platform_device anubis_device_ide0 = {
0229     .name       = "pata_platform",
0230     .id     = 0,
0231     .num_resources  = ARRAY_SIZE(anubis_ide0_resource),
0232     .resource   = anubis_ide0_resource,
0233     .dev    = {
0234         .platform_data = &anubis_ide_platdata,
0235         .coherent_dma_mask = ~0,
0236     },
0237 };
0238
0239 static struct resource anubis_ide1_resource[] = {
0240     [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),
0241     [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32),
0242     [2] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
0243 };
0244
0245 static struct platform_device anubis_device_ide1 = {
0246     .name       = "pata_platform",
0247     .id     = 1,
0248     .num_resources  = ARRAY_SIZE(anubis_ide1_resource),
0249     .resource   = anubis_ide1_resource,
0250     .dev    = {
0251         .platform_data = &anubis_ide_platdata,
0252         .coherent_dma_mask = ~0,
0253     },
0254 };
0255
0256 /* Asix AX88796 10/100 ethernet controller */
0257
0258 static struct ax_plat_data anubis_asix_platdata = {
0259     .flags      = AXFLG_MAC_FROMDEV,
0260     .wordlength = 2,
0261     .dcr_val    = 0x48,
0262     .rcr_val    = 0x40,
0263 };
0264
0265 static struct resource anubis_asix_resource[] = {
0266     [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
0267     [1] = DEFINE_RES_IRQ(ANUBIS_IRQ_ASIX),
0268 };
0269
0270 static struct platform_device anubis_device_asix = {
0271     .name       = "ax88796",
0272     .id     = 0,
0273     .num_resources  = ARRAY_SIZE(anubis_asix_resource),
0274     .resource   = anubis_asix_resource,
0275     .dev        = {
0276         .platform_data = &anubis_asix_platdata,
0277     }
0278 };
0279
0280 /* SM501 */
0281
0282 static struct resource anubis_sm501_resource[] = {
0283     [0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M),
0284     [1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M),
0285     [2] = DEFINE_RES_IRQ(IRQ_EINT0),
0286 };
0287
0288 static struct sm501_initdata anubis_sm501_initdata = {
0289     .gpio_high  = {
0290         .set    = 0x3F000000,       /* 24bit panel */
0291         .mask   = 0x0,
0292     },
0293     .misc_timing    = {
0294         .set    = 0x010100,     /* SDRAM timing */
0295         .mask   = 0x1F1F00,
0296     },
0297     .misc_control   = {
0298         .set    = SM501_MISC_PNL_24BIT,
0299         .mask   = 0,
0300     },
0301
0302     .devices    = SM501_USE_GPIO,
0303
0304     /* set the SDRAM and bus clocks */
0305     .mclk       = 72 * MHZ,
0306     .m1xclk     = 144 * MHZ,
0307 };
0308
0309 static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = {
0310     [0] = {
0311         .bus_num    = 1,
0312         .pin_scl    = 44,
0313         .pin_sda    = 45,
0314     },
0315     [1] = {
0316         .bus_num    = 2,
0317         .pin_scl    = 40,
0318         .pin_sda    = 41,
0319     },
0320 };
0321
0322 static struct sm501_platdata anubis_sm501_platdata = {
0323     .init       = &anubis_sm501_initdata,
0324     .gpio_base  = -1,
0325     .gpio_i2c   = anubis_sm501_gpio_i2c,
0326     .gpio_i2c_nr    = ARRAY_SIZE(anubis_sm501_gpio_i2c),
0327 };
0328
0329 static struct platform_device anubis_device_sm501 = {
0330     .name       = "sm501",
0331     .id     = 0,
0332     .num_resources  = ARRAY_SIZE(anubis_sm501_resource),
0333     .resource   = anubis_sm501_resource,
0334     .dev        = {
0335         .platform_data = &anubis_sm501_platdata,
0336     },
0337 };
0338
0339 /* Standard Anubis devices */
0340
0341 static struct platform_device *anubis_devices[] __initdata = {
0342     &s3c2410_device_dclk,
0343     &s3c_device_ohci,
0344     &s3c_device_wdt,
0345     &s3c_device_adc,
0346     &s3c_device_i2c0,
0347     &s3c_device_rtc,
0348     &s3c_device_nand,
0349     &anubis_device_ide0,
0350     &anubis_device_ide1,
0351     &anubis_device_asix,
0352     &anubis_device_sm501,
0353 };
0354
0355 /* I2C devices. */
0356
0357 static struct i2c_board_info anubis_i2c_devs[] __initdata = {
0358     {
0359         I2C_BOARD_INFO("tps65011", 0x48),
0360         .irq    = IRQ_EINT20,
0361     }
0362 };
0363
0364 /* Audio setup */
0365 static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = {
0366     .have_mic   = 1,
0367     .have_lout  = 1,
0368     .output_cdclk   = 1,
0369     .use_mpllin = 1,
0370     .amp_gpio   = S3C2410_GPB(2),
0371     .amp_gain[0]    = S3C2410_GPD(10),
0372     .amp_gain[1]    = S3C2410_GPD(11),
0373 };
0374
0375 static void __init anubis_map_io(void)
0376 {
0377     s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));
0378     s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));
0379     s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
0380
0381     /* check for the newer revision boards with large page nand */
0382
0383     if ((__raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK) >= 4) {
0384         printk(KERN_INFO "ANUBIS-B detected (revision %d)\n",
0385                __raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK);
0386         anubis_nand_sets[0].partitions = anubis_default_nand_part_large;
0387         anubis_nand_sets[0].nr_partitions = ARRAY_SIZE(anubis_default_nand_part_large);
0388     } else {
0389         /* ensure that the GPIO is setup */
0390         gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL);
0391         gpio_free(S3C2410_GPA(0));
0392     }
0393 }
0394
0395 static void __init anubis_init_time(void)
0396 {
0397     s3c2440_init_clocks(12000000);
0398     s3c24xx_timer_init();
0399 }
0400
0401 static void __init anubis_init(void)
0402 {
0403     s3c_i2c0_set_platdata(NULL);
0404     s3c_nand_set_platdata(&anubis_nand_info);
0405     simtec_audio_add(NULL, false, &anubis_audio);
0406
0407     platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices));
0408
0409     i2c_register_board_info(0, anubis_i2c_devs,
0410                 ARRAY_SIZE(anubis_i2c_devs));
0411 }
0412
0413
0414 MACHINE_START(ANUBIS, "Simtec-Anubis")
0415     /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
0416     .atag_offset    = 0x100,
0417     .nr_irqs    = NR_IRQS_S3C2440,
0418     .map_io     = anubis_map_io,
0419     .init_machine   = anubis_init,
0420     .init_irq   = s3c2440_init_irq,
0421     .init_time  = anubis_init_time,
0422 MACHINE_END