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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /* linux/drivers/spi/spi_s3c24xx_fiq.S
0003  *
0004  * Copyright 2009 Simtec Electronics
0005  *  Ben Dooks <ben@simtec.co.uk>
0006  *
0007  * S3C24XX SPI - FIQ pseudo-DMA transfer code
0008 */
0009 
0010 #include <linux/linkage.h>
0011 #include <asm/assembler.h>
0012 
0013 #include "map.h"
0014 #include "regs-irq.h"
0015 
0016 #include <linux/spi/s3c24xx-fiq.h>
0017 
0018 #define S3C2410_SPTDAT           (0x10)
0019 #define S3C2410_SPRDAT           (0x14)
0020 
0021     .text
0022 
0023     @ entry to these routines is as follows, with the register names
0024     @ defined in fiq.h so that they can be shared with the C files which
0025     @ setup the calling registers.
0026     @
0027     @ fiq_rirq  The base of the IRQ registers to find S3C2410_SRCPND
0028     @ fiq_rtmp  Temporary register to hold tx/rx data
0029     @ fiq_rspi  The base of the SPI register block
0030     @ fiq_rtx   The tx buffer pointer
0031     @ fiq_rrx   The rx buffer pointer
0032     @ fiq_rcount    The number of bytes to move
0033 
0034     @ each entry starts with a word entry of how long it is
0035     @ and an offset to the irq acknowledgment word
0036 
0037 ENTRY(s3c24xx_spi_fiq_rx)
0038     .word   fiq_rx_end - fiq_rx_start
0039     .word   fiq_rx_irq_ack - fiq_rx_start
0040 fiq_rx_start:
0041     ldr fiq_rtmp, fiq_rx_irq_ack
0042     str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
0043 
0044     ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
0045     strb    fiq_rtmp, [ fiq_rrx ], #1
0046 
0047     mov fiq_rtmp, #0xff
0048     strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
0049 
0050     subs    fiq_rcount, fiq_rcount, #1
0051     subsne  pc, lr, #4      @@ return, still have work to do
0052 
0053     @@ set IRQ controller so that next op will trigger IRQ
0054     mov fiq_rtmp, #0
0055     str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
0056     subs    pc, lr, #4
0057 
0058 fiq_rx_irq_ack:
0059     .word   0
0060 fiq_rx_end:
0061 
0062 ENTRY(s3c24xx_spi_fiq_txrx)
0063     .word   fiq_txrx_end - fiq_txrx_start
0064     .word   fiq_txrx_irq_ack - fiq_txrx_start
0065 fiq_txrx_start:
0066 
0067     ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
0068     strb    fiq_rtmp, [ fiq_rrx ], #1
0069 
0070     ldr fiq_rtmp, fiq_txrx_irq_ack
0071     str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
0072 
0073     ldrb    fiq_rtmp, [ fiq_rtx ], #1
0074     strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
0075 
0076     subs    fiq_rcount, fiq_rcount, #1
0077     subsne  pc, lr, #4      @@ return, still have work to do
0078 
0079     mov fiq_rtmp, #0
0080     str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
0081     subs    pc, lr, #4
0082 
0083 fiq_txrx_irq_ack:
0084     .word   0
0085 
0086 fiq_txrx_end:
0087 
0088 ENTRY(s3c24xx_spi_fiq_tx)
0089     .word   fiq_tx_end - fiq_tx_start
0090     .word   fiq_tx_irq_ack - fiq_tx_start
0091 fiq_tx_start:
0092     ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
0093 
0094     ldr fiq_rtmp, fiq_tx_irq_ack
0095     str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
0096 
0097     ldrb    fiq_rtmp, [ fiq_rtx ], #1
0098     strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
0099 
0100     subs    fiq_rcount, fiq_rcount, #1
0101     subsne  pc, lr, #4      @@ return, still have work to do
0102 
0103     mov fiq_rtmp, #0
0104     str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
0105     subs    pc, lr, #4
0106 
0107 fiq_tx_irq_ack:
0108     .word   0
0109 
0110 fiq_tx_end:
0111 
0112     .end