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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 2003-2006 Simtec Electronics
0004  *  Ben Dooks <ben@simtec.co.uk>
0005  *
0006  * Samsung S3C24XX DMA support
0007  */
0008 
0009 #ifndef __ASM_ARCH_DMA_H
0010 #define __ASM_ARCH_DMA_H __FILE__
0011 
0012 #include <linux/device.h>
0013 
0014 /* We use `virtual` dma channels to hide the fact we have only a limited
0015  * number of DMA channels, and not of all of them (dependent on the device)
0016  * can be attached to any DMA source. We therefore let the DMA core handle
0017  * the allocation of hardware channels to clients.
0018 */
0019 
0020 enum dma_ch {
0021     DMACH_XD0 = 0,
0022     DMACH_XD1,
0023     DMACH_SDI,
0024     DMACH_SPI0,
0025     DMACH_SPI1,
0026     DMACH_UART0,
0027     DMACH_UART1,
0028     DMACH_UART2,
0029     DMACH_TIMER,
0030     DMACH_I2S_IN,
0031     DMACH_I2S_OUT,
0032     DMACH_PCM_IN,
0033     DMACH_PCM_OUT,
0034     DMACH_MIC_IN,
0035     DMACH_USB_EP1,
0036     DMACH_USB_EP2,
0037     DMACH_USB_EP3,
0038     DMACH_USB_EP4,
0039     DMACH_UART0_SRC2,   /* s3c2412 second uart sources */
0040     DMACH_UART1_SRC2,
0041     DMACH_UART2_SRC2,
0042     DMACH_UART3,        /* s3c2443 has extra uart */
0043     DMACH_UART3_SRC2,
0044     DMACH_SPI0_TX,      /* s3c2443/2416/2450 hsspi0 */
0045     DMACH_SPI0_RX,      /* s3c2443/2416/2450 hsspi0 */
0046     DMACH_SPI1_TX,      /* s3c2443/2450 hsspi1 */
0047     DMACH_SPI1_RX,      /* s3c2443/2450 hsspi1 */
0048     DMACH_MAX,      /* the end entry */
0049 };
0050 
0051 #endif /* __ASM_ARCH_DMA_H */