arm/mach-pxa/pxa27x.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/arch/arm/mach-pxa/pxa27x.c
0004  *
0005  *  Author: Nicolas Pitre
0006  *  Created:    Nov 05, 2002
0007  *  Copyright:  MontaVista Software Inc.
0008  *
0009  * Code specific to PXA27x aka Bulverde.
0010  */
0011 #include <linux/dmaengine.h>
0012 #include <linux/dma/pxa-dma.h>
0013 #include <linux/gpio.h>
0014 #include <linux/gpio-pxa.h>
0015 #include <linux/module.h>
0016 #include <linux/kernel.h>
0017 #include <linux/init.h>
0018 #include <linux/irqchip.h>
0019 #include <linux/suspend.h>
0020 #include <linux/platform_device.h>
0021 #include <linux/syscore_ops.h>
0022 #include <linux/io.h>
0023 #include <linux/irq.h>
0024 #include <linux/platform_data/i2c-pxa.h>
0025 #include <linux/platform_data/mmp_dma.h>
0026 #include <linux/soc/pxa/cpu.h>
0027
0028 #include <asm/mach/map.h>
0029 #include <asm/irq.h>
0030 #include <asm/suspend.h>
0031 #include "irqs.h"
0032 #include "pxa27x.h"
0033 #include "reset.h"
0034 #include <linux/platform_data/usb-ohci-pxa27x.h>
0035 #include "pm.h"
0036 #include "addr-map.h"
0037 #include "smemc.h"
0038
0039 #include "generic.h"
0040 #include "devices.h"
0041 #include <linux/clk-provider.h>
0042 #include <linux/clkdev.h>
0043
0044 void pxa27x_clear_otgph(void)
0045 {
0046     if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
0047         PSSR |= PSSR_OTGPH;
0048 }
0049 EXPORT_SYMBOL(pxa27x_clear_otgph);
0050
0051 static unsigned long ac97_reset_config[] = {
0052     GPIO113_AC97_nRESET_GPIO_HIGH,
0053     GPIO113_AC97_nRESET,
0054     GPIO95_AC97_nRESET_GPIO_HIGH,
0055     GPIO95_AC97_nRESET,
0056 };
0057
0058 void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio)
0059 {
0060     /*
0061      * This helper function is used to work around a bug in the pxa27x's
0062      * ac97 controller during a warm reset.  The configuration of the
0063      * reset_gpio is changed as follows:
0064      * to_gpio == true: configured to generic output gpio and driven high
0065      * to_gpio == false: configured to ac97 controller alt fn AC97_nRESET
0066      */
0067
0068     if (reset_gpio == 113)
0069         pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[0] :
0070                   &ac97_reset_config[1], 1);
0071
0072     if (reset_gpio == 95)
0073         pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[2] :
0074                   &ac97_reset_config[3], 1);
0075 }
0076 EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset);
0077
0078 #ifdef CONFIG_PM
0079
0080 #define SAVE(x)     sleep_save[SLEEP_SAVE_##x] = x
0081 #define RESTORE(x)  x = sleep_save[SLEEP_SAVE_##x]
0082
0083 /*
0084  * allow platforms to override default PWRMODE setting used for PM_SUSPEND_MEM
0085  */
0086 static unsigned int pwrmode = PWRMODE_SLEEP;
0087
0088 int pxa27x_set_pwrmode(unsigned int mode)
0089 {
0090     switch (mode) {
0091     case PWRMODE_SLEEP:
0092     case PWRMODE_DEEPSLEEP:
0093         pwrmode = mode;
0094         return 0;
0095     }
0096
0097     return -EINVAL;
0098 }
0099
0100 /*
0101  * List of global PXA peripheral registers to preserve.
0102  * More ones like CP and general purpose register values are preserved
0103  * with the stack pointer in sleep.S.
0104  */
0105 enum {
0106     SLEEP_SAVE_PSTR,
0107     SLEEP_SAVE_MDREFR,
0108     SLEEP_SAVE_PCFR,
0109     SLEEP_SAVE_COUNT
0110 };
0111
0112 void pxa27x_cpu_pm_save(unsigned long *sleep_save)
0113 {
0114     sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR);
0115     SAVE(PCFR);
0116
0117     SAVE(PSTR);
0118 }
0119
0120 void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
0121 {
0122     __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR);
0123     RESTORE(PCFR);
0124
0125     PSSR = PSSR_RDH | PSSR_PH;
0126
0127     RESTORE(PSTR);
0128 }
0129
0130 void pxa27x_cpu_pm_enter(suspend_state_t state)
0131 {
0132     extern void pxa_cpu_standby(void);
0133 #ifndef CONFIG_IWMMXT
0134     u64 acc0;
0135
0136     asm volatile(".arch_extension xscale\n\t"
0137              "mra %Q0, %R0, acc0" : "=r" (acc0));
0138 #endif
0139
0140     /* ensure voltage-change sequencer not initiated, which hangs */
0141     PCFR &= ~PCFR_FVC;
0142
0143     /* Clear edge-detect status register. */
0144     PEDR = 0xDF12FE1B;
0145
0146     /* Clear reset status */
0147     RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
0148
0149     switch (state) {
0150     case PM_SUSPEND_STANDBY:
0151         pxa_cpu_standby();
0152         break;
0153     case PM_SUSPEND_MEM:
0154         cpu_suspend(pwrmode, pxa27x_finish_suspend);
0155 #ifndef CONFIG_IWMMXT
0156         asm volatile(".arch_extension xscale\n\t"
0157                  "mar acc0, %Q0, %R0" : "=r" (acc0));
0158 #endif
0159         break;
0160     }
0161 }
0162
0163 static int pxa27x_cpu_pm_valid(suspend_state_t state)
0164 {
0165     return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
0166 }
0167
0168 static int pxa27x_cpu_pm_prepare(void)
0169 {
0170     /* set resume return address */
0171     PSPR = __pa_symbol(cpu_resume);
0172     return 0;
0173 }
0174
0175 static void pxa27x_cpu_pm_finish(void)
0176 {
0177     /* ensure not to come back here if it wasn't intended */
0178     PSPR = 0;
0179 }
0180
0181 static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
0182     .save_count = SLEEP_SAVE_COUNT,
0183     .save       = pxa27x_cpu_pm_save,
0184     .restore    = pxa27x_cpu_pm_restore,
0185     .valid      = pxa27x_cpu_pm_valid,
0186     .enter      = pxa27x_cpu_pm_enter,
0187     .prepare    = pxa27x_cpu_pm_prepare,
0188     .finish     = pxa27x_cpu_pm_finish,
0189 };
0190
0191 static void __init pxa27x_init_pm(void)
0192 {
0193     pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
0194 }
0195 #else
0196 static inline void pxa27x_init_pm(void) {}
0197 #endif
0198
0199 /* PXA27x:  Various gpios can issue wakeup events.  This logic only
0200  * handles the simple cases, not the WEMUX2 and WEMUX3 options
0201  */
0202 static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
0203 {
0204     int gpio = pxa_irq_to_gpio(d->irq);
0205     uint32_t mask;
0206
0207     if (gpio >= 0 && gpio < 128)
0208         return gpio_set_wake(gpio, on);
0209
0210     if (d->irq == IRQ_KEYPAD)
0211         return keypad_set_wake(on);
0212
0213     switch (d->irq) {
0214     case IRQ_RTCAlrm:
0215         mask = PWER_RTC;
0216         break;
0217     case IRQ_USB:
0218         mask = 1u << 26;
0219         break;
0220     default:
0221         return -EINVAL;
0222     }
0223
0224     if (on)
0225         PWER |= mask;
0226     else
0227         PWER &=~mask;
0228
0229     return 0;
0230 }
0231
0232 void __init pxa27x_init_irq(void)
0233 {
0234     pxa_init_irq(34, pxa27x_set_wake);
0235 }
0236
0237 static int __init
0238 pxa27x_dt_init_irq(struct device_node *node, struct device_node *parent)
0239 {
0240     pxa_dt_irq_init(pxa27x_set_wake);
0241     set_handle_irq(ichp_handle_irq);
0242
0243     return 0;
0244 }
0245 IRQCHIP_DECLARE(pxa27x_intc, "marvell,pxa-intc", pxa27x_dt_init_irq);
0246
0247 static struct map_desc pxa27x_io_desc[] __initdata = {
0248     {   /* Mem Ctl */
0249         .virtual    = (unsigned long)SMEMC_VIRT,
0250         .pfn        = __phys_to_pfn(PXA2XX_SMEMC_BASE),
0251         .length     = SMEMC_SIZE,
0252         .type       = MT_DEVICE
0253     }, {    /* UNCACHED_PHYS_0 */
0254         .virtual    = UNCACHED_PHYS_0,
0255         .pfn        = __phys_to_pfn(0x00000000),
0256         .length     = UNCACHED_PHYS_0_SIZE,
0257         .type       = MT_DEVICE
0258     },
0259 };
0260
0261 void __init pxa27x_map_io(void)
0262 {
0263     pxa_map_io();
0264     iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc));
0265     pxa27x_get_clk_frequency_khz(1);
0266 }
0267
0268 /*
0269  * device registration specific to PXA27x.
0270  */
0271 void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
0272 {
0273     local_irq_disable();
0274     PCFR |= PCFR_PI2CEN;
0275     local_irq_enable();
0276     pxa_register_device(&pxa27x_device_i2c_power, info);
0277 }
0278
0279 static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
0280     .irq_base   = PXA_GPIO_TO_IRQ(0),
0281     .gpio_set_wake  = gpio_set_wake,
0282 };
0283
0284 static struct platform_device *devices[] __initdata = {
0285     &pxa27x_device_udc,
0286     &pxa_device_pmu,
0287     &pxa_device_i2s,
0288     &pxa_device_asoc_ssp1,
0289     &pxa_device_asoc_ssp2,
0290     &pxa_device_asoc_ssp3,
0291     &pxa_device_asoc_platform,
0292     &pxa_device_rtc,
0293     &pxa27x_device_ssp1,
0294     &pxa27x_device_ssp2,
0295     &pxa27x_device_ssp3,
0296     &pxa27x_device_pwm0,
0297     &pxa27x_device_pwm1,
0298 };
0299
0300 static const struct dma_slave_map pxa27x_slave_map[] = {
0301     /* PXA25x, PXA27x and PXA3xx common entries */
0302     { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
0303     { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
0304     { "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
0305       PDMA_FILTER_PARAM(LOWEST, 10) },
0306     { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
0307     { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
0308     { "pxa-ssp-dai.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
0309     { "pxa-ssp-dai.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
0310     { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
0311     { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
0312     { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
0313     { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
0314     { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
0315     { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
0316     { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 66) },
0317     { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 67) },
0318
0319     /* PXA27x specific map */
0320     { "pxa2xx-i2s", "rx", PDMA_FILTER_PARAM(LOWEST, 2) },
0321     { "pxa2xx-i2s", "tx", PDMA_FILTER_PARAM(LOWEST, 3) },
0322     { "pxa27x-camera.0", "CI_Y", PDMA_FILTER_PARAM(HIGHEST, 68) },
0323     { "pxa27x-camera.0", "CI_U", PDMA_FILTER_PARAM(HIGHEST, 69) },
0324     { "pxa27x-camera.0", "CI_V", PDMA_FILTER_PARAM(HIGHEST, 70) },
0325 };
0326
0327 static struct mmp_dma_platdata pxa27x_dma_pdata = {
0328     .dma_channels   = 32,
0329     .nb_requestors  = 75,
0330     .slave_map  = pxa27x_slave_map,
0331     .slave_map_cnt  = ARRAY_SIZE(pxa27x_slave_map),
0332 };
0333
0334 static int __init pxa27x_init(void)
0335 {
0336     int ret = 0;
0337
0338     if (cpu_is_pxa27x()) {
0339
0340         pxa_register_wdt(RCSR);
0341
0342         pxa27x_init_pm();
0343
0344         register_syscore_ops(&pxa_irq_syscore_ops);
0345         register_syscore_ops(&pxa2xx_mfp_syscore_ops);
0346
0347         if (!of_have_populated_dt()) {
0348             pxa_register_device(&pxa27x_device_gpio,
0349                         &pxa27x_gpio_info);
0350             pxa2xx_set_dmac_info(&pxa27x_dma_pdata);
0351             ret = platform_add_devices(devices,
0352                            ARRAY_SIZE(devices));
0353         }
0354     }
0355
0356     return ret;
0357 }
0358
0359 postcore_initcall(pxa27x_init);