arm/mach-pxa/pxa25x.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/arch/arm/mach-pxa/pxa25x.c
0004  *
0005  *  Author: Nicolas Pitre
0006  *  Created:    Jun 15, 2001
0007  *  Copyright:  MontaVista Software Inc.
0008  *
0009  * Code specific to PXA21x/25x/26x variants.
0010  *
0011  * Since this file should be linked before any other machine specific file,
0012  * the __initcall() here will be executed first.  This serves as default
0013  * initialization stuff for PXA machines which can be overridden later if
0014  * need be.
0015  */
0016 #include <linux/dmaengine.h>
0017 #include <linux/dma/pxa-dma.h>
0018 #include <linux/gpio.h>
0019 #include <linux/gpio-pxa.h>
0020 #include <linux/module.h>
0021 #include <linux/kernel.h>
0022 #include <linux/init.h>
0023 #include <linux/platform_device.h>
0024 #include <linux/suspend.h>
0025 #include <linux/syscore_ops.h>
0026 #include <linux/irq.h>
0027 #include <linux/irqchip.h>
0028 #include <linux/platform_data/mmp_dma.h>
0029 #include <linux/soc/pxa/cpu.h>
0030
0031 #include <asm/mach/map.h>
0032 #include <asm/suspend.h>
0033 #include "irqs.h"
0034 #include "pxa25x.h"
0035 #include "reset.h"
0036 #include "pm.h"
0037 #include "addr-map.h"
0038 #include "smemc.h"
0039
0040 #include "generic.h"
0041 #include "devices.h"
0042
0043 /*
0044  * Various clock factors driven by the CCCR register.
0045  */
0046
0047 #ifdef CONFIG_PM
0048
0049 #define SAVE(x)     sleep_save[SLEEP_SAVE_##x] = x
0050 #define RESTORE(x)  x = sleep_save[SLEEP_SAVE_##x]
0051
0052 /*
0053  * List of global PXA peripheral registers to preserve.
0054  * More ones like CP and general purpose register values are preserved
0055  * with the stack pointer in sleep.S.
0056  */
0057 enum {
0058     SLEEP_SAVE_PSTR,
0059     SLEEP_SAVE_COUNT
0060 };
0061
0062
0063 static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
0064 {
0065     SAVE(PSTR);
0066 }
0067
0068 static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
0069 {
0070     RESTORE(PSTR);
0071 }
0072
0073 static void pxa25x_cpu_pm_enter(suspend_state_t state)
0074 {
0075     /* Clear reset status */
0076     RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
0077
0078     switch (state) {
0079     case PM_SUSPEND_MEM:
0080         cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
0081         break;
0082     }
0083 }
0084
0085 static int pxa25x_cpu_pm_prepare(void)
0086 {
0087     /* set resume return address */
0088     PSPR = __pa_symbol(cpu_resume);
0089     return 0;
0090 }
0091
0092 static void pxa25x_cpu_pm_finish(void)
0093 {
0094     /* ensure not to come back here if it wasn't intended */
0095     PSPR = 0;
0096 }
0097
0098 static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
0099     .save_count = SLEEP_SAVE_COUNT,
0100     .valid      = suspend_valid_only_mem,
0101     .save       = pxa25x_cpu_pm_save,
0102     .restore    = pxa25x_cpu_pm_restore,
0103     .enter      = pxa25x_cpu_pm_enter,
0104     .prepare    = pxa25x_cpu_pm_prepare,
0105     .finish     = pxa25x_cpu_pm_finish,
0106 };
0107
0108 static void __init pxa25x_init_pm(void)
0109 {
0110     pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
0111 }
0112 #else
0113 static inline void pxa25x_init_pm(void) {}
0114 #endif
0115
0116 /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
0117  */
0118
0119 static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
0120 {
0121     int gpio = pxa_irq_to_gpio(d->irq);
0122     uint32_t mask = 0;
0123
0124     if (gpio >= 0 && gpio < 85)
0125         return gpio_set_wake(gpio, on);
0126
0127     if (d->irq == IRQ_RTCAlrm) {
0128         mask = PWER_RTC;
0129         goto set_pwer;
0130     }
0131
0132     return -EINVAL;
0133
0134 set_pwer:
0135     if (on)
0136         PWER |= mask;
0137     else
0138         PWER &=~mask;
0139
0140     return 0;
0141 }
0142
0143 void __init pxa25x_init_irq(void)
0144 {
0145     pxa_init_irq(32, pxa25x_set_wake);
0146 }
0147
0148 #ifdef CONFIG_CPU_PXA26x
0149 void __init pxa26x_init_irq(void)
0150 {
0151     pxa_init_irq(32, pxa25x_set_wake);
0152 }
0153 #endif
0154
0155 static int __init __init
0156 pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent)
0157 {
0158     pxa_dt_irq_init(pxa25x_set_wake);
0159     set_handle_irq(icip_handle_irq);
0160
0161     return 0;
0162 }
0163 IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
0164
0165 static struct map_desc pxa25x_io_desc[] __initdata = {
0166     {   /* Mem Ctl */
0167         .virtual    = (unsigned long)SMEMC_VIRT,
0168         .pfn        = __phys_to_pfn(PXA2XX_SMEMC_BASE),
0169         .length     = SMEMC_SIZE,
0170         .type       = MT_DEVICE
0171     }, {    /* UNCACHED_PHYS_0 */
0172         .virtual    = UNCACHED_PHYS_0,
0173         .pfn        = __phys_to_pfn(0x00000000),
0174         .length     = UNCACHED_PHYS_0_SIZE,
0175         .type       = MT_DEVICE
0176     },
0177 };
0178
0179 void __init pxa25x_map_io(void)
0180 {
0181     pxa_map_io();
0182     iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
0183     pxa25x_get_clk_frequency_khz(1);
0184 }
0185
0186 static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
0187     .irq_base   = PXA_GPIO_TO_IRQ(0),
0188     .gpio_set_wake  = gpio_set_wake,
0189 };
0190
0191 static struct platform_device *pxa25x_devices[] __initdata = {
0192     &pxa25x_device_udc,
0193     &pxa_device_pmu,
0194     &pxa_device_i2s,
0195     &sa1100_device_rtc,
0196     &pxa25x_device_ssp,
0197     &pxa25x_device_nssp,
0198     &pxa25x_device_assp,
0199     &pxa25x_device_pwm0,
0200     &pxa25x_device_pwm1,
0201     &pxa_device_asoc_platform,
0202 };
0203
0204 static const struct dma_slave_map pxa25x_slave_map[] = {
0205     /* PXA25x, PXA27x and PXA3xx common entries */
0206     { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
0207     { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
0208     { "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
0209       PDMA_FILTER_PARAM(LOWEST, 10) },
0210     { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
0211     { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
0212     { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
0213     { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
0214     { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
0215     { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
0216     { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
0217     { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
0218     { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
0219     { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
0220
0221     /* PXA25x specific map */
0222     { "pxa25x-ssp.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
0223     { "pxa25x-ssp.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
0224     { "pxa25x-nssp.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
0225     { "pxa25x-nssp.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
0226     { "pxa25x-nssp.2", "rx", PDMA_FILTER_PARAM(LOWEST, 23) },
0227     { "pxa25x-nssp.2", "tx", PDMA_FILTER_PARAM(LOWEST, 24) },
0228 };
0229
0230 static struct mmp_dma_platdata pxa25x_dma_pdata = {
0231     .dma_channels   = 16,
0232     .nb_requestors  = 40,
0233     .slave_map  = pxa25x_slave_map,
0234     .slave_map_cnt  = ARRAY_SIZE(pxa25x_slave_map),
0235 };
0236
0237 static int __init pxa25x_init(void)
0238 {
0239     int ret = 0;
0240
0241     if (cpu_is_pxa25x()) {
0242
0243         pxa_register_wdt(RCSR);
0244
0245         pxa25x_init_pm();
0246
0247         register_syscore_ops(&pxa_irq_syscore_ops);
0248         register_syscore_ops(&pxa2xx_mfp_syscore_ops);
0249
0250         if (!of_have_populated_dt()) {
0251             pxa2xx_set_dmac_info(&pxa25x_dma_pdata);
0252             pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
0253             ret = platform_add_devices(pxa25x_devices,
0254                            ARRAY_SIZE(pxa25x_devices));
0255         }
0256     }
0257
0258     return ret;
0259 }
0260
0261 postcore_initcall(pxa25x_init);