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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * GPIOs and interrupts for Palm Zire72 Handheld Computer
0004  *
0005  * Authors: Alex Osborne <bobofdoom@gmail.com>
0006  *      Jan Herman <2hp@seznam.cz>
0007  *      Sergey Lapin <slapin@ossfans.org>
0008  */
0009 
0010 #ifndef _INCLUDE_PALMZ72_H_
0011 #define _INCLUDE_PALMZ72_H_
0012 
0013 /* Power and control */
0014 #define GPIO_NR_PALMZ72_GPIO_RESET      1
0015 #define GPIO_NR_PALMZ72_POWER_DETECT        0
0016 
0017 /* SD/MMC */
0018 #define GPIO_NR_PALMZ72_SD_DETECT_N     14
0019 #define GPIO_NR_PALMZ72_SD_POWER_N      98
0020 #define GPIO_NR_PALMZ72_SD_RO           115
0021 
0022 /* Touchscreen */
0023 #define GPIO_NR_PALMZ72_WM9712_IRQ      27
0024 
0025 /* IRDA -  disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
0026 #define GPIO_NR_PALMZ72_IR_DISABLE      49
0027 
0028 /* USB */
0029 #define GPIO_NR_PALMZ72_USB_DETECT_N        15
0030 #define GPIO_NR_PALMZ72_USB_PULLUP      95
0031 
0032 /* LCD/Backlight */
0033 #define GPIO_NR_PALMZ72_BL_POWER        20
0034 #define GPIO_NR_PALMZ72_LCD_POWER       96
0035 
0036 /* LED */
0037 #define GPIO_NR_PALMZ72_LED_GREEN       88
0038 
0039 /* Bluetooth */
0040 #define GPIO_NR_PALMZ72_BT_POWER        17
0041 #define GPIO_NR_PALMZ72_BT_RESET        83
0042 
0043 /* Camera */
0044 #define GPIO_NR_PALMZ72_CAM_PWDN        56
0045 #define GPIO_NR_PALMZ72_CAM_RESET       57
0046 #define GPIO_NR_PALMZ72_CAM_POWER       91
0047 
0048 /** Initial values **/
0049 
0050 /* Battery */
0051 #define PALMZ72_BAT_MAX_VOLTAGE     4000    /* 4.00v current voltage */
0052 #define PALMZ72_BAT_MIN_VOLTAGE     3550    /* 3.55v critical voltage */
0053 #define PALMZ72_BAT_MAX_CURRENT     0   /* unknown */
0054 #define PALMZ72_BAT_MIN_CURRENT     0   /* unknown */
0055 #define PALMZ72_BAT_MAX_CHARGE      1   /* unknown */
0056 #define PALMZ72_BAT_MIN_CHARGE      1   /* unknown */
0057 #define PALMZ72_MAX_LIFE_MINS       360 /* on-life in minutes */
0058 
0059 /* Backlight */
0060 #define PALMZ72_MAX_INTENSITY       0xFE
0061 #define PALMZ72_DEFAULT_INTENSITY   0x7E
0062 #define PALMZ72_LIMIT_MASK      0x7F
0063 #define PALMZ72_PRESCALER       0x3F
0064 #define PALMZ72_PERIOD_NS       3500
0065 
0066 #ifdef CONFIG_PM
0067 struct palmz72_resume_info {
0068     u32 magic0;     /* 0x0 */
0069     u32 magic1;     /* 0x4 */
0070     u32 resume_addr;    /* 0x8 */
0071     u32 pad[11];        /* 0xc..0x37 */
0072     u32 arm_control;    /* 0x38 */
0073     u32 aux_control;    /* 0x3c */
0074     u32 ttb;        /* 0x40 */
0075     u32 domain_access;  /* 0x44 */
0076     u32 process_id;     /* 0x48 */
0077 };
0078 #endif
0079 #endif
0080