0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019 #include <linux/serial_8250.h>
0020 #include <linux/dm9000.h>
0021 #include <linux/gpio/machine.h>
0022 #include <linux/platform_data/i2c-pxa.h>
0023
0024 #include <linux/platform_data/mtd-nand-pxa3xx.h>
0025
0026 #include <linux/platform_data/video-pxafb.h>
0027 #include <linux/platform_data/mmc-pxamci.h>
0028 #include <linux/platform_data/usb-ohci-pxa27x.h>
0029 #include <linux/platform_data/asoc-pxa.h>
0030 #include "pxa320.h"
0031
0032 #include "mxm8x10.h"
0033
0034 #include "devices.h"
0035 #include "generic.h"
0036
0037
0038
0039
0040
0041
0042
0043
0044
0045
0046
0047
0048
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071
0072
0073
0074
0075
0076
0077
0078
0079
0080
0081
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091
0092
0093
0094
0095
0096
0097
0098
0099
0100
0101
0102
0103
0104
0105
0106
0107
0108
0109
0110
0111
0112
0113
0114
0115
0116
0117
0118
0119
0120
0121
0122
0123
0124
0125
0126
0127
0128
0129
0130
0131
0132
0133
0134
0135
0136
0137
0138
0139
0140
0141
0142
0143
0144
0145
0146
0147
0148
0149
0150
0151
0152
0153
0154
0155
0156
0157
0158
0159
0160
0161
0162
0163
0164
0165
0166
0167
0168
0169
0170
0171
0172
0173
0174
0175
0176
0177
0178
0179
0180
0181
0182
0183
0184
0185
0186
0187
0188
0189
0190
0191
0192
0193
0194
0195
0196
0197
0198
0199
0200
0201
0202
0203
0204
0205
0206
0207
0208
0209
0210
0211
0212
0213
0214
0215
0216
0217
0218
0219
0220
0221
0222
0223
0224
0225
0226
0227
0228
0229
0230
0231
0232
0233 static mfp_cfg_t mfp_cfg[] __initdata = {
0234
0235 GPIO10_UTM_CLK,
0236 GPIO49_U2D_PHYDATA_0,
0237 GPIO50_U2D_PHYDATA_1,
0238 GPIO51_U2D_PHYDATA_2,
0239 GPIO52_U2D_PHYDATA_3,
0240 GPIO53_U2D_PHYDATA_4,
0241 GPIO54_U2D_PHYDATA_5,
0242 GPIO55_U2D_PHYDATA_6,
0243 GPIO56_U2D_PHYDATA_7,
0244 GPIO58_UTM_RXVALID,
0245 GPIO59_UTM_RXACTIVE,
0246 GPIO60_U2D_RXERROR,
0247 GPIO61_U2D_OPMODE0,
0248 GPIO62_U2D_OPMODE1,
0249 GPIO71_GPIO,
0250 GPIO73_UTM_TXREADY,
0251 GPIO83_U2D_TXVALID,
0252 GPIO98_U2D_RESET,
0253 GPIO99_U2D_XCVR_SEL,
0254 GPIO100_U2D_TERM_SEL,
0255 GPIO101_U2D_SUSPEND,
0256 GPIO102_UTM_LINESTATE_0,
0257 GPIO103_UTM_LINESTATE_1,
0258 GPIO4_2_GPIO | MFP_PULL_HIGH,
0259
0260
0261 GPIO1_GPIO,
0262 GPIO9_GPIO,
0263 GPIO36_GPIO,
0264
0265
0266 GPIO35_AC97_SDATA_IN_0,
0267 GPIO37_AC97_SDATA_OUT,
0268 GPIO38_AC97_SYNC,
0269 GPIO39_AC97_BITCLK,
0270 GPIO40_AC97_nACRESET,
0271
0272
0273 GPIO41_UART1_RXD,
0274 GPIO42_UART1_TXD,
0275 GPIO43_UART1_CTS,
0276 GPIO44_UART1_DCD,
0277 GPIO45_UART1_DSR,
0278 GPIO46_UART1_RI,
0279 GPIO47_UART1_DTR,
0280 GPIO48_UART1_RTS,
0281
0282 GPIO109_UART2_RTS,
0283 GPIO110_UART2_RXD,
0284 GPIO111_UART2_TXD,
0285 GPIO112_UART2_CTS,
0286
0287 GPIO105_UART3_CTS,
0288 GPIO106_UART3_RTS,
0289 GPIO107_UART3_TXD,
0290 GPIO108_UART3_RXD,
0291
0292 GPIO78_GPIO,
0293 GPIO79_GPIO,
0294 GPIO80_GPIO,
0295 GPIO81_GPIO,
0296
0297
0298 GPIO32_I2C_SCL,
0299 GPIO33_I2C_SDA,
0300
0301
0302 GPIO18_MMC1_DAT0,
0303 GPIO19_MMC1_DAT1,
0304 GPIO20_MMC1_DAT2,
0305 GPIO21_MMC1_DAT3,
0306 GPIO22_MMC1_CLK,
0307 GPIO23_MMC1_CMD,
0308 GPIO72_GPIO | MFP_PULL_HIGH,
0309 GPIO84_GPIO | MFP_PULL_LOW,
0310
0311
0312 GPIO74_GPIO | MFP_LPM_EDGE_RISE,
0313 GPIO75_GPIO | MFP_LPM_EDGE_RISE,
0314 GPIO76_GPIO | MFP_LPM_EDGE_RISE,
0315 GPIO77_GPIO | MFP_LPM_EDGE_RISE,
0316 GPIO78_GPIO | MFP_LPM_EDGE_RISE,
0317 GPIO79_GPIO | MFP_LPM_EDGE_RISE,
0318 GPIO80_GPIO | MFP_LPM_EDGE_RISE,
0319 GPIO81_GPIO | MFP_LPM_EDGE_RISE
0320 };
0321
0322
0323 #if defined(CONFIG_MMC)
0324 static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
0325 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
0326 .detect_delay_ms = 10,
0327 };
0328
0329 static struct gpiod_lookup_table mxm_8x10_mci_gpio_table = {
0330 .dev_id = "pxa2xx-mci.0",
0331 .table = {
0332
0333 GPIO_LOOKUP("gpio-pxa", MXM_8X10_SD_nCD,
0334 "cd", GPIO_ACTIVE_LOW),
0335
0336 GPIO_LOOKUP("gpio-pxa", MXM_8X10_SD_WP,
0337 "wp", GPIO_ACTIVE_LOW),
0338 { },
0339 },
0340 };
0341
0342 void __init mxm_8x10_mmc_init(void)
0343 {
0344 gpiod_add_lookup_table(&mxm_8x10_mci_gpio_table);
0345 pxa_set_mci_info(&mxm_8x10_mci_platform_data);
0346 }
0347 #endif
0348
0349
0350 static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
0351 .port_mode = PMM_NPS_MODE,
0352 .flags = ENABLE_PORT_ALL
0353 };
0354
0355 void __init mxm_8x10_usb_host_init(void)
0356 {
0357 pxa_set_ohci_info(&mxm_8x10_ohci_platform_data);
0358 }
0359
0360 void __init mxm_8x10_ac97_init(void)
0361 {
0362 pxa_set_ac97_info(NULL);
0363 }
0364
0365
0366 #if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
0367 #define NAND_BLOCK_SIZE SZ_128K
0368 #define NB(x) (NAND_BLOCK_SIZE * (x))
0369 static struct mtd_partition mxm_8x10_nand_partitions[] = {
0370 [0] = {
0371 .name = "boot",
0372 .size = NB(0x002),
0373 .offset = NB(0x000),
0374 .mask_flags = MTD_WRITEABLE
0375 },
0376 [1] = {
0377 .name = "kernel",
0378 .size = NB(0x010),
0379 .offset = NB(0x002),
0380 .mask_flags = MTD_WRITEABLE
0381 },
0382 [2] = {
0383 .name = "root",
0384 .size = NB(0x36c),
0385 .offset = NB(0x012)
0386 },
0387 [3] = {
0388 .name = "bbt",
0389 .size = NB(0x082),
0390 .offset = NB(0x37e),
0391 .mask_flags = MTD_WRITEABLE
0392 }
0393 };
0394
0395 static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
0396 .keep_config = 1,
0397 .parts = mxm_8x10_nand_partitions,
0398 .nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions)
0399 };
0400
0401 static void __init mxm_8x10_nand_init(void)
0402 {
0403 pxa3xx_set_nand_info(&mxm_8x10_nand_info);
0404 }
0405 #else
0406 static inline void mxm_8x10_nand_init(void) {}
0407 #endif
0408
0409
0410 static struct resource dm9k_resources[] = {
0411 [0] = {
0412 .start = MXM_8X10_ETH_PHYS + 0x300,
0413 .end = MXM_8X10_ETH_PHYS + 0x300,
0414 .flags = IORESOURCE_MEM
0415 },
0416 [1] = {
0417 .start = MXM_8X10_ETH_PHYS + 0x308,
0418 .end = MXM_8X10_ETH_PHYS + 0x308,
0419 .flags = IORESOURCE_MEM
0420 },
0421 [2] = {
0422 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
0423 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
0424 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
0425 }
0426 };
0427
0428 static struct dm9000_plat_data dm9k_plat_data = {
0429 .flags = DM9000_PLATF_16BITONLY
0430 };
0431
0432 static struct platform_device dm9k_device = {
0433 .name = "dm9000",
0434 .id = 0,
0435 .num_resources = ARRAY_SIZE(dm9k_resources),
0436 .resource = dm9k_resources,
0437 .dev = {
0438 .platform_data = &dm9k_plat_data
0439 }
0440 };
0441
0442 static void __init mxm_8x10_ethernet_init(void)
0443 {
0444 platform_device_register(&dm9k_device);
0445 }
0446
0447
0448 static void __init mxm_8x10_uarts_init(void)
0449 {
0450 pxa_set_ffuart_info(NULL);
0451 pxa_set_btuart_info(NULL);
0452 pxa_set_stuart_info(NULL);
0453 }
0454
0455
0456 static struct i2c_board_info __initdata mxm_8x10_i2c_devices[] = {
0457 {
0458 I2C_BOARD_INFO("ds1337", 0x68)
0459 }
0460 };
0461
0462 static void __init mxm_8x10_i2c_init(void)
0463 {
0464 i2c_register_board_info(0, mxm_8x10_i2c_devices,
0465 ARRAY_SIZE(mxm_8x10_i2c_devices));
0466 pxa_set_i2c_info(NULL);
0467 }
0468
0469 void __init mxm_8x10_barebones_init(void)
0470 {
0471 pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg));
0472
0473 mxm_8x10_uarts_init();
0474 mxm_8x10_nand_init();
0475 mxm_8x10_i2c_init();
0476 mxm_8x10_ethernet_init();
0477 }