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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * linux/arch/arm/mach-pxa/lpd270.c
0004  *
0005  * Support for the LogicPD PXA270 Card Engine.
0006  * Derived from the mainstone code, which carries these notices:
0007  *
0008  * Author:  Nicolas Pitre
0009  * Created: Nov 05, 2002
0010  * Copyright:   MontaVista Software Inc.
0011  */
0012 #include <linux/gpio.h>
0013 #include <linux/init.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/syscore_ops.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/sched.h>
0018 #include <linux/bitops.h>
0019 #include <linux/fb.h>
0020 #include <linux/ioport.h>
0021 #include <linux/mtd/mtd.h>
0022 #include <linux/mtd/partitions.h>
0023 #include <linux/pwm.h>
0024 #include <linux/pwm_backlight.h>
0025 #include <linux/smc91x.h>
0026 
0027 #include <asm/types.h>
0028 #include <asm/setup.h>
0029 #include <asm/memory.h>
0030 #include <asm/mach-types.h>
0031 #include <asm/irq.h>
0032 #include <linux/sizes.h>
0033 
0034 #include <asm/mach/arch.h>
0035 #include <asm/mach/map.h>
0036 #include <asm/mach/irq.h>
0037 #include <asm/mach/flash.h>
0038 
0039 #include "pxa27x.h"
0040 #include "lpd270.h"
0041 #include "addr-map.h"
0042 #include <linux/platform_data/asoc-pxa.h>
0043 #include <linux/platform_data/video-pxafb.h>
0044 #include <linux/platform_data/mmc-pxamci.h>
0045 #include <linux/platform_data/irda-pxaficp.h>
0046 #include <linux/platform_data/usb-ohci-pxa27x.h>
0047 #include "smemc.h"
0048 
0049 #include "generic.h"
0050 #include "devices.h"
0051 
0052 static unsigned long lpd270_pin_config[] __initdata = {
0053     /* Chip Selects */
0054     GPIO15_nCS_1,   /* Mainboard Flash */
0055     GPIO78_nCS_2,   /* CPLD + Ethernet */
0056 
0057     /* LCD - 16bpp Active TFT */
0058     GPIO58_LCD_LDD_0,
0059     GPIO59_LCD_LDD_1,
0060     GPIO60_LCD_LDD_2,
0061     GPIO61_LCD_LDD_3,
0062     GPIO62_LCD_LDD_4,
0063     GPIO63_LCD_LDD_5,
0064     GPIO64_LCD_LDD_6,
0065     GPIO65_LCD_LDD_7,
0066     GPIO66_LCD_LDD_8,
0067     GPIO67_LCD_LDD_9,
0068     GPIO68_LCD_LDD_10,
0069     GPIO69_LCD_LDD_11,
0070     GPIO70_LCD_LDD_12,
0071     GPIO71_LCD_LDD_13,
0072     GPIO72_LCD_LDD_14,
0073     GPIO73_LCD_LDD_15,
0074     GPIO74_LCD_FCLK,
0075     GPIO75_LCD_LCLK,
0076     GPIO76_LCD_PCLK,
0077     GPIO77_LCD_BIAS,
0078     GPIO16_PWM0_OUT,    /* Backlight */
0079 
0080     /* USB Host */
0081     GPIO88_USBH1_PWR,
0082     GPIO89_USBH1_PEN,
0083 
0084     /* AC97 */
0085     GPIO28_AC97_BITCLK,
0086     GPIO29_AC97_SDATA_IN_0,
0087     GPIO30_AC97_SDATA_OUT,
0088     GPIO31_AC97_SYNC,
0089     GPIO45_AC97_SYSCLK,
0090 
0091     GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
0092 };
0093 
0094 static unsigned int lpd270_irq_enabled;
0095 
0096 static void lpd270_mask_irq(struct irq_data *d)
0097 {
0098     int lpd270_irq = d->irq - LPD270_IRQ(0);
0099 
0100     __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
0101 
0102     lpd270_irq_enabled &= ~(1 << lpd270_irq);
0103     __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
0104 }
0105 
0106 static void lpd270_unmask_irq(struct irq_data *d)
0107 {
0108     int lpd270_irq = d->irq - LPD270_IRQ(0);
0109 
0110     lpd270_irq_enabled |= 1 << lpd270_irq;
0111     __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
0112 }
0113 
0114 static struct irq_chip lpd270_irq_chip = {
0115     .name       = "CPLD",
0116     .irq_ack    = lpd270_mask_irq,
0117     .irq_mask   = lpd270_mask_irq,
0118     .irq_unmask = lpd270_unmask_irq,
0119 };
0120 
0121 static void lpd270_irq_handler(struct irq_desc *desc)
0122 {
0123     unsigned int irq;
0124     unsigned long pending;
0125 
0126     pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
0127     do {
0128         /* clear useless edge notification */
0129         desc->irq_data.chip->irq_ack(&desc->irq_data);
0130         if (likely(pending)) {
0131             irq = LPD270_IRQ(0) + __ffs(pending);
0132             generic_handle_irq(irq);
0133 
0134             pending = __raw_readw(LPD270_INT_STATUS) &
0135                         lpd270_irq_enabled;
0136         }
0137     } while (pending);
0138 }
0139 
0140 static void __init lpd270_init_irq(void)
0141 {
0142     int irq;
0143 
0144     pxa27x_init_irq();
0145 
0146     __raw_writew(0, LPD270_INT_MASK);
0147     __raw_writew(0, LPD270_INT_STATUS);
0148 
0149     /* setup extra LogicPD PXA270 irqs */
0150     for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
0151         irq_set_chip_and_handler(irq, &lpd270_irq_chip,
0152                      handle_level_irq);
0153         irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
0154     }
0155     irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
0156     irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
0157 }
0158 
0159 
0160 #ifdef CONFIG_PM
0161 static void lpd270_irq_resume(void)
0162 {
0163     __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
0164 }
0165 
0166 static struct syscore_ops lpd270_irq_syscore_ops = {
0167     .resume = lpd270_irq_resume,
0168 };
0169 
0170 static int __init lpd270_irq_device_init(void)
0171 {
0172     if (machine_is_logicpd_pxa270()) {
0173         register_syscore_ops(&lpd270_irq_syscore_ops);
0174         return 0;
0175     }
0176     return -ENODEV;
0177 }
0178 
0179 device_initcall(lpd270_irq_device_init);
0180 #endif
0181 
0182 
0183 static struct resource smc91x_resources[] = {
0184     [0] = {
0185         .start  = LPD270_ETH_PHYS,
0186         .end    = (LPD270_ETH_PHYS + 0xfffff),
0187         .flags  = IORESOURCE_MEM,
0188     },
0189     [1] = {
0190         .start  = LPD270_ETHERNET_IRQ,
0191         .end    = LPD270_ETHERNET_IRQ,
0192         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
0193     },
0194 };
0195 
0196 struct smc91x_platdata smc91x_platdata = {
0197     .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
0198 };
0199 
0200 static struct platform_device smc91x_device = {
0201     .name       = "smc91x",
0202     .id     = 0,
0203     .num_resources  = ARRAY_SIZE(smc91x_resources),
0204     .resource   = smc91x_resources,
0205     .dev.platform_data = &smc91x_platdata,
0206 };
0207 
0208 static struct resource lpd270_flash_resources[] = {
0209     [0] = {
0210         .start  = PXA_CS0_PHYS,
0211         .end    = PXA_CS0_PHYS + SZ_64M - 1,
0212         .flags  = IORESOURCE_MEM,
0213     },
0214     [1] = {
0215         .start  = PXA_CS1_PHYS,
0216         .end    = PXA_CS1_PHYS + SZ_64M - 1,
0217         .flags  = IORESOURCE_MEM,
0218     },
0219 };
0220 
0221 static struct mtd_partition lpd270_flash0_partitions[] = {
0222     {
0223         .name =     "Bootloader",
0224         .size =     0x00040000,
0225         .offset =   0,
0226         .mask_flags =   MTD_WRITEABLE  /* force read-only */
0227     }, {
0228         .name =     "Kernel",
0229         .size =     0x00400000,
0230         .offset =   0x00040000,
0231     }, {
0232         .name =     "Filesystem",
0233         .size =     MTDPART_SIZ_FULL,
0234         .offset =   0x00440000
0235     },
0236 };
0237 
0238 static struct flash_platform_data lpd270_flash_data[2] = {
0239     {
0240         .name       = "processor-flash",
0241         .map_name   = "cfi_probe",
0242         .parts      = lpd270_flash0_partitions,
0243         .nr_parts   = ARRAY_SIZE(lpd270_flash0_partitions),
0244     }, {
0245         .name       = "mainboard-flash",
0246         .map_name   = "cfi_probe",
0247         .parts      = NULL,
0248         .nr_parts   = 0,
0249     }
0250 };
0251 
0252 static struct platform_device lpd270_flash_device[2] = {
0253     {
0254         .name       = "pxa2xx-flash",
0255         .id     = 0,
0256         .dev = {
0257             .platform_data  = &lpd270_flash_data[0],
0258         },
0259         .resource   = &lpd270_flash_resources[0],
0260         .num_resources  = 1,
0261     }, {
0262         .name       = "pxa2xx-flash",
0263         .id     = 1,
0264         .dev = {
0265             .platform_data  = &lpd270_flash_data[1],
0266         },
0267         .resource   = &lpd270_flash_resources[1],
0268         .num_resources  = 1,
0269     },
0270 };
0271 
0272 static struct pwm_lookup lpd270_pwm_lookup[] = {
0273     PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770,
0274            PWM_POLARITY_NORMAL),
0275 };
0276 
0277 static struct platform_pwm_backlight_data lpd270_backlight_data = {
0278     .max_brightness = 1,
0279     .dft_brightness = 1,
0280 };
0281 
0282 static struct platform_device lpd270_backlight_device = {
0283     .name       = "pwm-backlight",
0284     .dev        = {
0285         .parent = &pxa27x_device_pwm0.dev,
0286         .platform_data = &lpd270_backlight_data,
0287     },
0288 };
0289 
0290 /* 5.7" TFT QVGA (LoLo display number 1) */
0291 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
0292     .pixclock       = 150000,
0293     .xres           = 320,
0294     .yres           = 240,
0295     .bpp            = 16,
0296     .hsync_len      = 0x14,
0297     .left_margin        = 0x28,
0298     .right_margin       = 0x0a,
0299     .vsync_len      = 0x02,
0300     .upper_margin       = 0x08,
0301     .lower_margin       = 0x14,
0302     .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
0303 };
0304 
0305 static struct pxafb_mach_info sharp_lq057q3dc02 = {
0306     .modes          = &sharp_lq057q3dc02_mode,
0307     .num_modes      = 1,
0308     .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
0309                   LCD_ALTERNATE_MAPPING,
0310 };
0311 
0312 /* 12.1" TFT SVGA (LoLo display number 2) */
0313 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
0314     .pixclock       = 50000,
0315     .xres           = 800,
0316     .yres           = 600,
0317     .bpp            = 16,
0318     .hsync_len      = 0x05,
0319     .left_margin        = 0x52,
0320     .right_margin       = 0x05,
0321     .vsync_len      = 0x04,
0322     .upper_margin       = 0x14,
0323     .lower_margin       = 0x0a,
0324     .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
0325 };
0326 
0327 static struct pxafb_mach_info sharp_lq121s1dg31 = {
0328     .modes          = &sharp_lq121s1dg31_mode,
0329     .num_modes      = 1,
0330     .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
0331                   LCD_ALTERNATE_MAPPING,
0332 };
0333 
0334 /* 3.6" TFT QVGA (LoLo display number 3) */
0335 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
0336     .pixclock       = 150000,
0337     .xres           = 320,
0338     .yres           = 240,
0339     .bpp            = 16,
0340     .hsync_len      = 0x0e,
0341     .left_margin        = 0x04,
0342     .right_margin       = 0x0a,
0343     .vsync_len      = 0x03,
0344     .upper_margin       = 0x03,
0345     .lower_margin       = 0x03,
0346     .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
0347 };
0348 
0349 static struct pxafb_mach_info sharp_lq036q1da01 = {
0350     .modes          = &sharp_lq036q1da01_mode,
0351     .num_modes      = 1,
0352     .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
0353                   LCD_ALTERNATE_MAPPING,
0354 };
0355 
0356 /* 6.4" TFT VGA (LoLo display number 5) */
0357 static struct pxafb_mode_info sharp_lq64d343_mode = {
0358     .pixclock       = 25000,
0359     .xres           = 640,
0360     .yres           = 480,
0361     .bpp            = 16,
0362     .hsync_len      = 0x31,
0363     .left_margin        = 0x89,
0364     .right_margin       = 0x19,
0365     .vsync_len      = 0x12,
0366     .upper_margin       = 0x22,
0367     .lower_margin       = 0x00,
0368     .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
0369 };
0370 
0371 static struct pxafb_mach_info sharp_lq64d343 = {
0372     .modes          = &sharp_lq64d343_mode,
0373     .num_modes      = 1,
0374     .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
0375                   LCD_ALTERNATE_MAPPING,
0376 };
0377 
0378 /* 10.4" TFT VGA (LoLo display number 7) */
0379 static struct pxafb_mode_info sharp_lq10d368_mode = {
0380     .pixclock       = 25000,
0381     .xres           = 640,
0382     .yres           = 480,
0383     .bpp            = 16,
0384     .hsync_len      = 0x31,
0385     .left_margin        = 0x89,
0386     .right_margin       = 0x19,
0387     .vsync_len      = 0x12,
0388     .upper_margin       = 0x22,
0389     .lower_margin       = 0x00,
0390     .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
0391 };
0392 
0393 static struct pxafb_mach_info sharp_lq10d368 = {
0394     .modes          = &sharp_lq10d368_mode,
0395     .num_modes      = 1,
0396     .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
0397                   LCD_ALTERNATE_MAPPING,
0398 };
0399 
0400 /* 3.5" TFT QVGA (LoLo display number 8) */
0401 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
0402     .pixclock       = 150000,
0403     .xres           = 240,
0404     .yres           = 320,
0405     .bpp            = 16,
0406     .hsync_len      = 0x0e,
0407     .left_margin        = 0x0a,
0408     .right_margin       = 0x0a,
0409     .vsync_len      = 0x03,
0410     .upper_margin       = 0x05,
0411     .lower_margin       = 0x14,
0412     .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
0413 };
0414 
0415 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
0416     .modes          = &sharp_lq035q7db02_20_mode,
0417     .num_modes      = 1,
0418     .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
0419                   LCD_ALTERNATE_MAPPING,
0420 };
0421 
0422 static struct pxafb_mach_info *lpd270_lcd_to_use;
0423 
0424 static int __init lpd270_set_lcd(char *str)
0425 {
0426     if (!strncasecmp(str, "lq057q3dc02", 11)) {
0427         lpd270_lcd_to_use = &sharp_lq057q3dc02;
0428     } else if (!strncasecmp(str, "lq121s1dg31", 11)) {
0429         lpd270_lcd_to_use = &sharp_lq121s1dg31;
0430     } else if (!strncasecmp(str, "lq036q1da01", 11)) {
0431         lpd270_lcd_to_use = &sharp_lq036q1da01;
0432     } else if (!strncasecmp(str, "lq64d343", 8)) {
0433         lpd270_lcd_to_use = &sharp_lq64d343;
0434     } else if (!strncasecmp(str, "lq10d368", 8)) {
0435         lpd270_lcd_to_use = &sharp_lq10d368;
0436     } else if (!strncasecmp(str, "lq035q7db02-20", 14)) {
0437         lpd270_lcd_to_use = &sharp_lq035q7db02_20;
0438     } else {
0439         printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
0440     }
0441 
0442     return 1;
0443 }
0444 
0445 __setup("lcd=", lpd270_set_lcd);
0446 
0447 static struct platform_device *platform_devices[] __initdata = {
0448     &smc91x_device,
0449     &lpd270_backlight_device,
0450     &lpd270_flash_device[0],
0451     &lpd270_flash_device[1],
0452 };
0453 
0454 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
0455     .port_mode  = PMM_PERPORT_MODE,
0456     .flags      = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
0457 };
0458 
0459 static void __init lpd270_init(void)
0460 {
0461     pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
0462 
0463     pxa_set_ffuart_info(NULL);
0464     pxa_set_btuart_info(NULL);
0465     pxa_set_stuart_info(NULL);
0466 
0467     lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
0468     lpd270_flash_data[1].width = 4;
0469 
0470     /*
0471      * System bus arbiter setting:
0472      * - Core_Park
0473      * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
0474      */
0475     ARB_CNTRL = ARB_CORE_PARK | 0x234;
0476 
0477     pwm_add_table(lpd270_pwm_lookup, ARRAY_SIZE(lpd270_pwm_lookup));
0478     platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
0479 
0480     pxa_set_ac97_info(NULL);
0481 
0482     if (lpd270_lcd_to_use != NULL)
0483         pxa_set_fb_info(NULL, lpd270_lcd_to_use);
0484 
0485     pxa_set_ohci_info(&lpd270_ohci_platform_data);
0486 }
0487 
0488 
0489 static struct map_desc lpd270_io_desc[] __initdata = {
0490     {
0491         .virtual    = (unsigned long)LPD270_CPLD_VIRT,
0492         .pfn        = __phys_to_pfn(LPD270_CPLD_PHYS),
0493         .length     = LPD270_CPLD_SIZE,
0494         .type       = MT_DEVICE,
0495     },
0496 };
0497 
0498 static void __init lpd270_map_io(void)
0499 {
0500     pxa27x_map_io();
0501     iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
0502 
0503     /* for use I SRAM as framebuffer.  */
0504     PSLR |= 0x00000F04;
0505     PCFR  = 0x00000066;
0506 }
0507 
0508 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
0509     /* Maintainer: Peter Barada */
0510     .atag_offset    = 0x100,
0511     .map_io     = lpd270_map_io,
0512     .nr_irqs    = LPD270_NR_IRQS,
0513     .init_irq   = lpd270_init_irq,
0514     .handle_irq = pxa27x_handle_irq,
0515     .init_time  = pxa_timer_init,
0516     .init_machine   = lpd270_init,
0517     .restart    = pxa_restart,
0518 MACHINE_END
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