arm/mach-orion5x/wnr854t-setup.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 // arch/arm/mach-orion5x/wnr854t-setup.c
0003 #include <linux/gpio.h>
0004 #include <linux/kernel.h>
0005 #include <linux/init.h>
0006 #include <linux/platform_device.h>
0007 #include <linux/pci.h>
0008 #include <linux/irq.h>
0009 #include <linux/delay.h>
0010 #include <linux/mtd/physmap.h>
0011 #include <linux/mv643xx_eth.h>
0012 #include <linux/ethtool.h>
0013 #include <linux/platform_data/dsa.h>
0014 #include <asm/mach-types.h>
0015 #include <asm/mach/arch.h>
0016 #include <asm/mach/pci.h>
0017 #include "orion5x.h"
0018 #include "common.h"
0019 #include "mpp.h"
0020
0021 static unsigned int wnr854t_mpp_modes[] __initdata = {
0022     MPP0_GPIO,      /* Power LED green (0=on) */
0023     MPP1_GPIO,      /* Reset Button (0=off) */
0024     MPP2_GPIO,      /* Power LED blink (0=off) */
0025     MPP3_GPIO,      /* WAN Status LED amber (0=off) */
0026     MPP4_GPIO,      /* PCI int */
0027     MPP5_GPIO,      /* ??? */
0028     MPP6_GPIO,      /* ??? */
0029     MPP7_GPIO,      /* ??? */
0030     MPP8_UNUSED,        /* ??? */
0031     MPP9_GIGE,      /* GE_RXERR */
0032     MPP10_UNUSED,       /* ??? */
0033     MPP11_UNUSED,       /* ??? */
0034     MPP12_GIGE,     /* GE_TXD[4] */
0035     MPP13_GIGE,     /* GE_TXD[5] */
0036     MPP14_GIGE,     /* GE_TXD[6] */
0037     MPP15_GIGE,     /* GE_TXD[7] */
0038     MPP16_GIGE,     /* GE_RXD[4] */
0039     MPP17_GIGE,     /* GE_RXD[5] */
0040     MPP18_GIGE,     /* GE_RXD[6] */
0041     MPP19_GIGE,     /* GE_RXD[7] */
0042     0,
0043 };
0044
0045 /*
0046  * 8M NOR flash Device bus boot chip select
0047  */
0048 #define WNR854T_NOR_BOOT_BASE   0xf4000000
0049 #define WNR854T_NOR_BOOT_SIZE   SZ_8M
0050
0051 static struct mtd_partition wnr854t_nor_flash_partitions[] = {
0052     {
0053         .name       = "kernel",
0054         .offset     = 0x00000000,
0055         .size       = 0x00100000,
0056     }, {
0057         .name       = "rootfs",
0058         .offset     = 0x00100000,
0059         .size       = 0x00660000,
0060     }, {
0061         .name       = "uboot",
0062         .offset     = 0x00760000,
0063         .size       = 0x00040000,
0064     },
0065 };
0066
0067 static struct physmap_flash_data wnr854t_nor_flash_data = {
0068     .width      = 2,
0069     .parts      = wnr854t_nor_flash_partitions,
0070     .nr_parts   = ARRAY_SIZE(wnr854t_nor_flash_partitions),
0071 };
0072
0073 static struct resource wnr854t_nor_flash_resource = {
0074     .flags      = IORESOURCE_MEM,
0075     .start      = WNR854T_NOR_BOOT_BASE,
0076     .end        = WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
0077 };
0078
0079 static struct platform_device wnr854t_nor_flash = {
0080     .name           = "physmap-flash",
0081     .id         = 0,
0082     .dev        = {
0083         .platform_data  = &wnr854t_nor_flash_data,
0084     },
0085     .num_resources      = 1,
0086     .resource       = &wnr854t_nor_flash_resource,
0087 };
0088
0089 static struct mv643xx_eth_platform_data wnr854t_eth_data = {
0090     .phy_addr   = MV643XX_ETH_PHY_NONE,
0091     .speed      = SPEED_1000,
0092     .duplex     = DUPLEX_FULL,
0093 };
0094
0095 static struct dsa_chip_data wnr854t_switch_chip_data = {
0096     .port_names[0] = "lan3",
0097     .port_names[1] = "lan4",
0098     .port_names[2] = "wan",
0099     .port_names[3] = "cpu",
0100     .port_names[5] = "lan1",
0101     .port_names[7] = "lan2",
0102 };
0103
0104 static void __init wnr854t_init(void)
0105 {
0106     /*
0107      * Setup basic Orion functions. Need to be called early.
0108      */
0109     orion5x_init();
0110
0111     orion5x_mpp_conf(wnr854t_mpp_modes);
0112
0113     /*
0114      * Configure peripherals.
0115      */
0116     orion5x_eth_init(&wnr854t_eth_data);
0117     orion5x_eth_switch_init(&wnr854t_switch_chip_data);
0118     orion5x_uart0_init();
0119
0120     mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
0121                     ORION_MBUS_DEVBUS_BOOT_ATTR,
0122                     WNR854T_NOR_BOOT_BASE,
0123                     WNR854T_NOR_BOOT_SIZE);
0124     platform_device_register(&wnr854t_nor_flash);
0125 }
0126
0127 static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
0128     u8 pin)
0129 {
0130     int irq;
0131
0132     /*
0133      * Check for devices with hard-wired IRQs.
0134      */
0135     irq = orion5x_pci_map_irq(dev, slot, pin);
0136     if (irq != -1)
0137         return irq;
0138
0139     /*
0140      * Mini-PCI slot.
0141      */
0142     if (slot == 7)
0143         return gpio_to_irq(4);
0144
0145     return -1;
0146 }
0147
0148 static struct hw_pci wnr854t_pci __initdata = {
0149     .nr_controllers = 2,
0150     .setup      = orion5x_pci_sys_setup,
0151     .scan       = orion5x_pci_sys_scan_bus,
0152     .map_irq    = wnr854t_pci_map_irq,
0153 };
0154
0155 static int __init wnr854t_pci_init(void)
0156 {
0157     if (machine_is_wnr854t())
0158         pci_common_init(&wnr854t_pci);
0159
0160     return 0;
0161 }
0162 subsys_initcall(wnr854t_pci_init);
0163
0164 MACHINE_START(WNR854T, "Netgear WNR854T")
0165     /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
0166     .atag_offset    = 0x100,
0167     .nr_irqs    = ORION5X_NR_IRQS,
0168     .init_machine   = wnr854t_init,
0169     .map_io     = orion5x_map_io,
0170     .init_early = orion5x_init_early,
0171     .init_irq   = orion5x_init_irq,
0172     .init_time  = orion5x_timer_init,
0173     .fixup      = tag_fixup_mem32,
0174     .restart    = orion5x_restart,
0175 MACHINE_END