arm/mach-orion5x/rd88f5181l-fxo-setup.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
0004  *
0005  * Marvell Orion-VoIP FXO Reference Design Setup
0006  */
0007 #include <linux/gpio.h>
0008 #include <linux/kernel.h>
0009 #include <linux/init.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/pci.h>
0012 #include <linux/irq.h>
0013 #include <linux/mtd/physmap.h>
0014 #include <linux/mv643xx_eth.h>
0015 #include <linux/ethtool.h>
0016 #include <linux/platform_data/dsa.h>
0017 #include <asm/mach-types.h>
0018 #include <asm/mach/arch.h>
0019 #include <asm/mach/pci.h>
0020 #include "common.h"
0021 #include "mpp.h"
0022 #include "orion5x.h"
0023
0024 /*****************************************************************************
0025  * RD-88F5181L FXO Info
0026  ****************************************************************************/
0027 /*
0028  * 8M NOR flash Device bus boot chip select
0029  */
0030 #define RD88F5181L_FXO_NOR_BOOT_BASE        0xff800000
0031 #define RD88F5181L_FXO_NOR_BOOT_SIZE        SZ_8M
0032
0033
0034 /*****************************************************************************
0035  * 8M NOR Flash on Device bus Boot chip select
0036  ****************************************************************************/
0037 static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
0038     .width      = 1,
0039 };
0040
0041 static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
0042     .flags      = IORESOURCE_MEM,
0043     .start      = RD88F5181L_FXO_NOR_BOOT_BASE,
0044     .end        = RD88F5181L_FXO_NOR_BOOT_BASE +
0045               RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
0046 };
0047
0048 static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
0049     .name           = "physmap-flash",
0050     .id         = 0,
0051     .dev        = {
0052         .platform_data  = &rd88f5181l_fxo_nor_boot_flash_data,
0053     },
0054     .num_resources      = 1,
0055     .resource       = &rd88f5181l_fxo_nor_boot_flash_resource,
0056 };
0057
0058
0059 /*****************************************************************************
0060  * General Setup
0061  ****************************************************************************/
0062 static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
0063     MPP0_GPIO,      /* LED1 CardBus LED (front panel) */
0064     MPP1_GPIO,      /* PCI_intA */
0065     MPP2_GPIO,      /* Hard Reset / Factory Init*/
0066     MPP3_GPIO,      /* FXS or DAA select */
0067     MPP4_GPIO,      /* LED6 - phone LED (front panel) */
0068     MPP5_GPIO,      /* LED5 - phone LED (front panel) */
0069     MPP6_PCI_CLK,       /* CPU PCI refclk */
0070     MPP7_PCI_CLK,       /* PCI/PCIe refclk */
0071     MPP8_GPIO,      /* CardBus reset */
0072     MPP9_GPIO,      /* GE_RXERR */
0073     MPP10_GPIO,     /* LED2 MiniPCI LED (front panel) */
0074     MPP11_GPIO,     /* Lifeline control */
0075     MPP12_GIGE,     /* GE_TXD[4] */
0076     MPP13_GIGE,     /* GE_TXD[5] */
0077     MPP14_GIGE,     /* GE_TXD[6] */
0078     MPP15_GIGE,     /* GE_TXD[7] */
0079     MPP16_GIGE,     /* GE_RXD[4] */
0080     MPP17_GIGE,     /* GE_RXD[5] */
0081     MPP18_GIGE,     /* GE_RXD[6] */
0082     MPP19_GIGE,     /* GE_RXD[7] */
0083     0,
0084 };
0085
0086 static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
0087     .phy_addr   = MV643XX_ETH_PHY_NONE,
0088     .speed      = SPEED_1000,
0089     .duplex     = DUPLEX_FULL,
0090 };
0091
0092 static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
0093     .port_names[0]  = "lan2",
0094     .port_names[1]  = "lan1",
0095     .port_names[2]  = "wan",
0096     .port_names[3]  = "cpu",
0097     .port_names[5]  = "lan4",
0098     .port_names[7]  = "lan3",
0099 };
0100
0101 static void __init rd88f5181l_fxo_init(void)
0102 {
0103     /*
0104      * Setup basic Orion functions. Need to be called early.
0105      */
0106     orion5x_init();
0107
0108     orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
0109
0110     /*
0111      * Configure peripherals.
0112      */
0113     orion5x_ehci0_init();
0114     orion5x_eth_init(&rd88f5181l_fxo_eth_data);
0115     orion5x_eth_switch_init(&rd88f5181l_fxo_switch_chip_data);
0116     orion5x_uart0_init();
0117
0118     mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
0119                     ORION_MBUS_DEVBUS_BOOT_ATTR,
0120                     RD88F5181L_FXO_NOR_BOOT_BASE,
0121                     RD88F5181L_FXO_NOR_BOOT_SIZE);
0122     platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
0123 }
0124
0125 static int __init
0126 rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
0127 {
0128     int irq;
0129
0130     /*
0131      * Check for devices with hard-wired IRQs.
0132      */
0133     irq = orion5x_pci_map_irq(dev, slot, pin);
0134     if (irq != -1)
0135         return irq;
0136
0137     /*
0138      * Mini-PCI / Cardbus slot.
0139      */
0140     return gpio_to_irq(1);
0141 }
0142
0143 static struct hw_pci rd88f5181l_fxo_pci __initdata = {
0144     .nr_controllers = 2,
0145     .setup      = orion5x_pci_sys_setup,
0146     .scan       = orion5x_pci_sys_scan_bus,
0147     .map_irq    = rd88f5181l_fxo_pci_map_irq,
0148 };
0149
0150 static int __init rd88f5181l_fxo_pci_init(void)
0151 {
0152     if (machine_is_rd88f5181l_fxo()) {
0153         orion5x_pci_set_cardbus_mode();
0154         pci_common_init(&rd88f5181l_fxo_pci);
0155     }
0156
0157     return 0;
0158 }
0159 subsys_initcall(rd88f5181l_fxo_pci_init);
0160
0161 MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
0162     /* Maintainer: Nicolas Pitre <nico@marvell.com> */
0163     .atag_offset    = 0x100,
0164     .nr_irqs    = ORION5X_NR_IRQS,
0165     .init_machine   = rd88f5181l_fxo_init,
0166     .map_io     = orion5x_map_io,
0167     .init_early = orion5x_init_early,
0168     .init_irq   = orion5x_init_irq,
0169     .init_time  = orion5x_timer_init,
0170     .fixup      = tag_fixup_mem32,
0171     .restart    = orion5x_restart,
0172 MACHINE_END