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0009 #ifndef __ASM_ARCH_ORION5X_H
0010 #define __ASM_ARCH_ORION5X_H
0011
0012 #include "irqs.h"
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0036 #define ORION5X_REGS_PHYS_BASE 0xf1000000
0037 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000)
0038 #define ORION5X_REGS_SIZE SZ_1M
0039
0040 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
0041 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000
0042 #define ORION5X_PCIE_IO_SIZE SZ_64K
0043
0044 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
0045 #define ORION5X_PCI_IO_BUS_BASE 0x00010000
0046 #define ORION5X_PCI_IO_SIZE SZ_64K
0047
0048 #define ORION5X_SRAM_PHYS_BASE (0xf2200000)
0049 #define ORION5X_SRAM_SIZE SZ_8K
0050
0051
0052 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
0053 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000)
0054 #define ORION5X_PCIE_WA_SIZE SZ_16M
0055
0056 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
0057 #define ORION5X_PCIE_MEM_SIZE SZ_128M
0058
0059 #define ORION5X_PCI_MEM_PHYS_BASE 0xe8000000
0060 #define ORION5X_PCI_MEM_SIZE SZ_128M
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0064
0065
0066 #define ORION5X_DDR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x00000)
0067 #define ORION5X_DDR_WINS_BASE (ORION5X_DDR_PHYS_BASE + 0x1500)
0068 #define ORION5X_DDR_WINS_SZ (0x10)
0069 #define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x00000)
0070 #define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x10000)
0071 #define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x10000)
0072 #define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE + (x))
0073 #define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100)
0074 #define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x0600)
0075 #define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x1000)
0076 #define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2000)
0077 #define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2000)
0078 #define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2100)
0079 #define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2100)
0080
0081 #define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x20000)
0082 #define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x20000)
0083 #define ORION5X_BRIDGE_WINS_BASE (ORION5X_BRIDGE_PHYS_BASE)
0084 #define ORION5X_BRIDGE_WINS_SZ (0x80)
0085
0086 #define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x30000)
0087
0088 #define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x40000)
0089
0090 #define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x50000)
0091 #define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x50000)
0092
0093 #define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x60900)
0094 #define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x60900)
0095
0096 #define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x70000)
0097 #define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x70000)
0098
0099 #define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x80000)
0100 #define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x80000)
0101
0102 #define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x90000)
0103
0104 #define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0xa0000)
0105 #define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0xa0000)
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0110 #define MPP_0_7_CTRL ORION5X_DEV_BUS_REG(0x000)
0111 #define MPP_8_15_CTRL ORION5X_DEV_BUS_REG(0x004)
0112 #define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050)
0113 #define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008)
0114 #define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010)
0115 #define DEV_BANK_0_PARAM ORION5X_DEV_BUS_REG(0x45c)
0116 #define DEV_BANK_1_PARAM ORION5X_DEV_BUS_REG(0x460)
0117 #define DEV_BANK_2_PARAM ORION5X_DEV_BUS_REG(0x464)
0118 #define DEV_BANK_BOOT_PARAM ORION5X_DEV_BUS_REG(0x46c)
0119 #define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0)
0120 #define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0)
0121 #define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4)
0122
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0126
0127 #define MV88F5181_DEV_ID 0x5181
0128 #define MV88F5181_REV_B1 3
0129 #define MV88F5181L_REV_A0 8
0130 #define MV88F5181L_REV_A1 9
0131
0132 #define MV88F5182_DEV_ID 0x5182
0133 #define MV88F5182_REV_A2 2
0134
0135 #define MV88F5281_DEV_ID 0x5281
0136 #define MV88F5281_REV_D0 4
0137 #define MV88F5281_REV_D1 5
0138 #define MV88F5281_REV_D2 6
0139
0140 #define MV88F6183_DEV_ID 0x6183
0141 #define MV88F6183_REV_B0 3
0142
0143 #endif