arm/mach-orion5x/irqs.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * IRQ definitions for Orion SoC
0004  *
0005  *  Maintainer: Tzachi Perelstein <tzachi@marvell.com>
0006  */
0007
0008 #ifndef __ASM_ARCH_IRQS_H
0009 #define __ASM_ARCH_IRQS_H
0010
0011 /*
0012  * Orion Main Interrupt Controller
0013  */
0014 #define IRQ_ORION5X_BRIDGE      (1 + 0)
0015 #define IRQ_ORION5X_DOORBELL_H2C    (1 + 1)
0016 #define IRQ_ORION5X_DOORBELL_C2H    (1 + 2)
0017 #define IRQ_ORION5X_UART0       (1 + 3)
0018 #define IRQ_ORION5X_UART1       (1 + 4)
0019 #define IRQ_ORION5X_I2C         (1 + 5)
0020 #define IRQ_ORION5X_GPIO_0_7        (1 + 6)
0021 #define IRQ_ORION5X_GPIO_8_15       (1 + 7)
0022 #define IRQ_ORION5X_GPIO_16_23      (1 + 8)
0023 #define IRQ_ORION5X_GPIO_24_31      (1 + 9)
0024 #define IRQ_ORION5X_PCIE0_ERR       (1 + 10)
0025 #define IRQ_ORION5X_PCIE0_INT       (1 + 11)
0026 #define IRQ_ORION5X_USB1_CTRL       (1 + 12)
0027 #define IRQ_ORION5X_DEV_BUS_ERR     (1 + 14)
0028 #define IRQ_ORION5X_PCI_ERR     (1 + 15)
0029 #define IRQ_ORION5X_USB_BR_ERR      (1 + 16)
0030 #define IRQ_ORION5X_USB0_CTRL       (1 + 17)
0031 #define IRQ_ORION5X_ETH_RX      (1 + 18)
0032 #define IRQ_ORION5X_ETH_TX      (1 + 19)
0033 #define IRQ_ORION5X_ETH_MISC        (1 + 20)
0034 #define IRQ_ORION5X_ETH_SUM     (1 + 21)
0035 #define IRQ_ORION5X_ETH_ERR     (1 + 22)
0036 #define IRQ_ORION5X_IDMA_ERR        (1 + 23)
0037 #define IRQ_ORION5X_IDMA_0      (1 + 24)
0038 #define IRQ_ORION5X_IDMA_1      (1 + 25)
0039 #define IRQ_ORION5X_IDMA_2      (1 + 26)
0040 #define IRQ_ORION5X_IDMA_3      (1 + 27)
0041 #define IRQ_ORION5X_CESA        (1 + 28)
0042 #define IRQ_ORION5X_SATA        (1 + 29)
0043 #define IRQ_ORION5X_XOR0        (1 + 30)
0044 #define IRQ_ORION5X_XOR1        (1 + 31)
0045
0046 /*
0047  * Orion General Purpose Pins
0048  */
0049 #define IRQ_ORION5X_GPIO_START  33
0050 #define NR_GPIO_IRQS        32
0051
0052 #define ORION5X_NR_IRQS     (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
0053
0054
0055 #endif