arm/mach-omap2/sr_device.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * OMAP3/OMAP4 smartreflex device file
0004  *
0005  * Author: Thara Gopinath   <thara@ti.com>
0006  *
0007  * Based originally on code from smartreflex.c
0008  * Copyright (C) 2010 Texas Instruments, Inc.
0009  * Thara Gopinath <thara@ti.com>
0010  *
0011  * Copyright (C) 2008 Nokia Corporation
0012  * Kalle Jokiniemi
0013  *
0014  * Copyright (C) 2007 Texas Instruments, Inc.
0015  * Lesly A M <x0080970@ti.com>
0016  */
0017 #include <linux/power/smartreflex.h>
0018
0019 #include <linux/err.h>
0020 #include <linux/slab.h>
0021 #include <linux/io.h>
0022
0023 #include "soc.h"
0024 #include "omap_device.h"
0025 #include "voltage.h"
0026 #include "control.h"
0027 #include "pm.h"
0028
0029 static bool sr_enable_on_init;
0030
0031 /* Read EFUSE values from control registers for OMAP3430 */
0032 static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
0033                 struct omap_sr_data *sr_data)
0034 {
0035     struct omap_sr_nvalue_table *nvalue_table;
0036     int i, j, count = 0;
0037
0038     sr_data->nvalue_count = 0;
0039     sr_data->nvalue_table = NULL;
0040
0041     while (volt_data[count].volt_nominal)
0042         count++;
0043
0044     nvalue_table = kcalloc(count, sizeof(*nvalue_table), GFP_KERNEL);
0045     if (!nvalue_table)
0046         return;
0047
0048     for (i = 0, j = 0; i < count; i++) {
0049         u32 v;
0050
0051         /*
0052          * In OMAP4 the efuse registers are 24 bit aligned.
0053          * A readl_relaxed will fail for non-32 bit aligned address
0054          * and hence the 8-bit read and shift.
0055          */
0056         if (cpu_is_omap44xx()) {
0057             u16 offset = volt_data[i].sr_efuse_offs;
0058
0059             v = omap_ctrl_readb(offset) |
0060                 omap_ctrl_readb(offset + 1) << 8 |
0061                 omap_ctrl_readb(offset + 2) << 16;
0062         } else {
0063             v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
0064         }
0065
0066         /*
0067          * Many OMAP SoCs don't have the eFuse values set.
0068          * For example, pretty much all OMAP3xxx before
0069          * ES3.something.
0070          *
0071          * XXX There needs to be some way for board files or
0072          * userspace to add these in.
0073          */
0074         if (v == 0)
0075             continue;
0076
0077         nvalue_table[j].nvalue = v;
0078         nvalue_table[j].efuse_offs = volt_data[i].sr_efuse_offs;
0079         nvalue_table[j].errminlimit = volt_data[i].sr_errminlimit;
0080         nvalue_table[j].volt_nominal = volt_data[i].volt_nominal;
0081
0082         j++;
0083     }
0084
0085     sr_data->nvalue_table = nvalue_table;
0086     sr_data->nvalue_count = j;
0087 }
0088
0089 extern struct omap_sr_data omap_sr_pdata[];
0090
0091 static int __init sr_init_by_name(const char *name, const char *voltdm)
0092 {
0093     struct omap_sr_data *sr_data = NULL;
0094     struct omap_volt_data *volt_data;
0095     static int i;
0096
0097     if (!strncmp(name, "smartreflex_mpu_iva", 20) ||
0098         !strncmp(name, "smartreflex_mpu", 16))
0099         sr_data = &omap_sr_pdata[OMAP_SR_MPU];
0100     else if (!strncmp(name, "smartreflex_core", 17))
0101         sr_data = &omap_sr_pdata[OMAP_SR_CORE];
0102     else if (!strncmp(name, "smartreflex_iva", 16))
0103         sr_data = &omap_sr_pdata[OMAP_SR_IVA];
0104
0105     if (!sr_data) {
0106         pr_err("%s: Unknown instance %s\n", __func__, name);
0107         return -EINVAL;
0108     }
0109
0110     sr_data->name = name;
0111     if (cpu_is_omap343x())
0112         sr_data->ip_type = 1;
0113     else
0114         sr_data->ip_type = 2;
0115     sr_data->senn_mod = 0x1;
0116     sr_data->senp_mod = 0x1;
0117
0118     if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
0119         sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
0120         sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
0121         sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
0122         if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
0123             sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
0124             sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
0125         } else {
0126             sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
0127             sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
0128         }
0129     }
0130
0131     sr_data->voltdm = voltdm_lookup(voltdm);
0132     if (!sr_data->voltdm) {
0133         pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
0134             __func__, voltdm);
0135         goto exit;
0136     }
0137
0138     omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
0139     if (!volt_data) {
0140         pr_err("%s: No Voltage table registered for VDD%d\n",
0141                __func__, i + 1);
0142         goto exit;
0143     }
0144
0145     sr_set_nvalues(volt_data, sr_data);
0146
0147     sr_data->enable_on_init = sr_enable_on_init;
0148
0149 exit:
0150     i++;
0151
0152     return 0;
0153 }
0154
0155 #ifdef CONFIG_OMAP_HWMOD
0156 static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
0157 {
0158     struct omap_smartreflex_dev_attr *sr_dev_attr;
0159
0160     sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
0161     if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
0162         pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
0163                __func__, oh->name);
0164         return 0;
0165     }
0166
0167     return sr_init_by_name(oh->name, sr_dev_attr->sensor_voltdm_name);
0168 }
0169 #else
0170 static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
0171 {
0172     return -EINVAL;
0173 }
0174 #endif
0175
0176 /*
0177  * API to be called from board files to enable smartreflex
0178  * autocompensation at init.
0179  */
0180 void __init omap_enable_smartreflex_on_init(void)
0181 {
0182     sr_enable_on_init = true;
0183 }
0184
0185 static const char * const omap4_sr_instances[] = {
0186     "mpu",
0187     "iva",
0188     "core",
0189 };
0190
0191 static const char * const dra7_sr_instances[] = {
0192     "mpu",
0193     "core",
0194 };
0195
0196 int __init omap_devinit_smartreflex(void)
0197 {
0198     const char * const *sr_inst = NULL;
0199     int i, nr_sr = 0;
0200
0201     if (soc_is_omap44xx()) {
0202         sr_inst = omap4_sr_instances;
0203         nr_sr = ARRAY_SIZE(omap4_sr_instances);
0204
0205     } else if (soc_is_dra7xx()) {
0206         sr_inst = dra7_sr_instances;
0207         nr_sr = ARRAY_SIZE(dra7_sr_instances);
0208     }
0209
0210     if (nr_sr) {
0211         const char *name, *voltdm;
0212
0213         for (i = 0; i < nr_sr; i++) {
0214             name = kasprintf(GFP_KERNEL, "smartreflex_%s", sr_inst[i]);
0215             voltdm = sr_inst[i];
0216             sr_init_by_name(name, voltdm);
0217         }
0218
0219         return 0;
0220     }
0221
0222     return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
0223 }