arm/mach-omap2/prm33xx.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * AM33XX PRM instance offset macros
0004  *
0005  * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
0006  */
0007
0008 #ifndef __ARCH_ARM_MACH_OMAP2_PRM33XX_H
0009 #define __ARCH_ARM_MACH_OMAP2_PRM33XX_H
0010
0011 #include "prcm-common.h"
0012 #include "prm.h"
0013
0014 #define AM33XX_PRM_BASE               0x44E00000
0015
0016 #define AM33XX_PRM_REGADDR(inst, reg)                         \
0017     AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRM_BASE + (inst) + (reg))
0018
0019
0020 /* PRM instances */
0021 #define AM33XX_PRM_OCP_SOCKET_MOD   0x0B00
0022 #define AM33XX_PRM_PER_MOD      0x0C00
0023 #define AM33XX_PRM_WKUP_MOD     0x0D00
0024 #define AM33XX_PRM_MPU_MOD      0x0E00
0025 #define AM33XX_PRM_DEVICE_MOD       0x0F00
0026 #define AM33XX_PRM_RTC_MOD      0x1000
0027 #define AM33XX_PRM_GFX_MOD      0x1100
0028 #define AM33XX_PRM_CEFUSE_MOD       0x1200
0029
0030 /* PRM.PER_PRM register offsets */
0031 #define AM33XX_PM_PER_PWRSTST_OFFSET        0x0008
0032 #define AM33XX_PM_PER_PWRSTST           AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008)
0033 #define AM33XX_PM_PER_PWRSTCTRL_OFFSET      0x000c
0034 #define AM33XX_PM_PER_PWRSTCTRL         AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x000c)
0035
0036 /* PRM.WKUP_PRM register offsets */
0037 #define AM33XX_PM_WKUP_PWRSTCTRL_OFFSET     0x0004
0038 #define AM33XX_PM_WKUP_PWRSTCTRL        AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0004)
0039 #define AM33XX_PM_WKUP_PWRSTST_OFFSET       0x0008
0040 #define AM33XX_PM_WKUP_PWRSTST          AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0008)
0041
0042 /* PRM.MPU_PRM register offsets */
0043 #define AM33XX_PM_MPU_PWRSTCTRL_OFFSET      0x0000
0044 #define AM33XX_PM_MPU_PWRSTCTRL         AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0000)
0045 #define AM33XX_PM_MPU_PWRSTST_OFFSET        0x0004
0046 #define AM33XX_PM_MPU_PWRSTST           AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0004)
0047
0048 /* PRM.DEVICE_PRM register offsets */
0049 #define AM33XX_PRM_RSTCTRL_OFFSET       0x0000
0050 #define AM33XX_PRM_RSTCTRL          AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0000)
0051
0052 /* PRM.RTC_PRM register offsets */
0053 #define AM33XX_PM_RTC_PWRSTCTRL_OFFSET      0x0000
0054 #define AM33XX_PM_RTC_PWRSTCTRL         AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0000)
0055 #define AM33XX_PM_RTC_PWRSTST_OFFSET        0x0004
0056 #define AM33XX_PM_RTC_PWRSTST           AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0004)
0057
0058 /* PRM.GFX_PRM register offsets */
0059 #define AM33XX_PM_GFX_PWRSTCTRL_OFFSET      0x0000
0060 #define AM33XX_PM_GFX_PWRSTCTRL         AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0000)
0061 #define AM33XX_PM_GFX_PWRSTST_OFFSET        0x0010
0062 #define AM33XX_PM_GFX_PWRSTST           AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0010)
0063
0064 /* PRM.CEFUSE_PRM register offsets */
0065 #define AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET   0x0000
0066 #define AM33XX_PM_CEFUSE_PWRSTCTRL      AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0000)
0067 #define AM33XX_PM_CEFUSE_PWRSTST_OFFSET     0x0004
0068 #define AM33XX_PM_CEFUSE_PWRSTST        AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
0069
0070 #ifndef __ASSEMBLER__
0071 int am33xx_prm_init(const struct omap_prcm_init_data *data);
0072
0073 #endif /* ASSEMBLER */
0074 #endif