arm/mach-omap2/prm.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions
0004  *
0005  * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
0006  * Copyright (C) 2010 Nokia Corporation
0007  *
0008  * Paul Walmsley
0009  */
0010 #ifndef __ARCH_ARM_MACH_OMAP2_PRM_H
0011 #define __ARCH_ARM_MACH_OMAP2_PRM_H
0012
0013 #include "prcm-common.h"
0014
0015 # ifndef __ASSEMBLER__
0016 extern struct omap_domain_base prm_base;
0017 extern u16 prm_features;
0018 extern void omap2_set_globals_prm(void __iomem *prm);
0019 int omap_prcm_init(void);
0020 int omap2_prm_base_init(void);
0021 int omap2_prcm_base_init(void);
0022 # endif
0023
0024 /*
0025  * prm_features flag values
0026  *
0027  * PRM_HAS_IO_WAKEUP: has IO wakeup capability
0028  * PRM_HAS_VOLTAGE: has voltage domains
0029  */
0030 #define PRM_HAS_IO_WAKEUP   BIT(0)
0031 #define PRM_HAS_VOLTAGE     BIT(1)
0032
0033 /*
0034  * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
0035  * module to softreset
0036  */
0037 #define MAX_MODULE_SOFTRESET_WAIT       10000
0038
0039 /*
0040  * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
0041  * submodule to exit hardreset
0042  */
0043 #define MAX_MODULE_HARDRESET_WAIT       10000
0044
0045 /*
0046  * Register bitfields
0047  */
0048
0049 /*
0050  * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
0051  *
0052  * 2430: PM_PWSTST_MDM
0053  *
0054  * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX,
0055  *   PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU,
0056  *   PM_PWSTST_NEON
0057  */
0058 #define OMAP_INTRANSITION_MASK              (1 << 20)
0059
0060
0061 /*
0062  * 24XX: PM_PWSTST_GFX, PM_PWSTST_DSP
0063  *
0064  * 2430: PM_PWSTST_MDM
0065  *
0066  * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX,
0067  *   PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU,
0068  *   PM_PWSTST_NEON
0069  */
0070 #define OMAP_POWERSTATEST_SHIFT             0
0071 #define OMAP_POWERSTATEST_MASK              (0x3 << 0)
0072
0073 /*
0074  * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX,
0075  *       PM_PWSTCTRL_DSP, PM_PWSTST_MPU
0076  *
0077  * 2430: PM_PWSTCTRL_MDM shared bits
0078  *
0079  * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE,
0080  *   PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSS, PM_PWSTCTRL_CAM, PM_PWSTCTRL_PER,
0081  *   PM_PWSTCTRL_NEON shared bits
0082  */
0083 #define OMAP_POWERSTATE_SHIFT               0
0084 #define OMAP_POWERSTATE_MASK                (0x3 << 0)
0085
0086 /*
0087  * Standardized OMAP reset source bits
0088  *
0089  * To the extent these happen to match the hardware register bit
0090  * shifts, it's purely coincidental.  Used by omap-wdt.c.
0091  * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever
0092  * there are any bits remaining in the global PRM_RSTST register that
0093  * haven't been identified, or when the PRM code for the current SoC
0094  * doesn't know how to interpret the register.
0095  */
0096 #define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT           0
0097 #define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT           1
0098 #define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT             2
0099 #define OMAP_MPU_WD_RST_SRC_ID_SHIFT                3
0100 #define OMAP_SECU_WD_RST_SRC_ID_SHIFT               4
0101 #define OMAP_EXTWARM_RST_SRC_ID_SHIFT               5
0102 #define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT            6
0103 #define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT            7
0104 #define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT           8
0105 #define OMAP_ICEPICK_RST_SRC_ID_SHIFT               9
0106 #define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT            10
0107 #define OMAP_C2C_RST_SRC_ID_SHIFT               11
0108 #define OMAP_UNKNOWN_RST_SRC_ID_SHIFT               12
0109
0110 #ifndef __ASSEMBLER__
0111
0112 /**
0113  * struct prm_reset_src_map - map register bitshifts to standard bitshifts
0114  * @reg_shift: bitshift in the PRM reset source register
0115  * @std_shift: bitshift equivalent in the standard reset source list
0116  *
0117  * The fields are signed because -1 is used as a terminator.
0118  */
0119 struct prm_reset_src_map {
0120     s8 reg_shift;
0121     s8 std_shift;
0122 };
0123
0124 /**
0125  * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations
0126  * @read_reset_sources: ptr to the SoC PRM-specific get_reset_source impl
0127  * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
0128  * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
0129  * @late_init: ptr to the late init function
0130  * @assert_hardreset: ptr to the SoC PRM hardreset assert impl
0131  * @deassert_hardreset: ptr to the SoC PRM hardreset deassert impl
0132  *
0133  * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
0134  * deprecated.
0135  */
0136 struct prm_ll_data {
0137     u32 (*read_reset_sources)(void);
0138     bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
0139     void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
0140     int (*late_init)(void);
0141     int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
0142     int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
0143                   u16 offset, u16 st_offset);
0144     int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
0145                      u16 offset);
0146     void (*reset_system)(void);
0147     int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask);
0148     u32 (*vp_check_txdone)(u8 vp_id);
0149     void (*vp_clear_txdone)(u8 vp_id);
0150 };
0151
0152 extern int prm_register(struct prm_ll_data *pld);
0153 extern int prm_unregister(struct prm_ll_data *pld);
0154
0155 int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
0156 int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
0157                 u16 offset, u16 st_offset);
0158 int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
0159 extern u32 prm_read_reset_sources(void);
0160 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
0161 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
0162 void omap_prm_reset_system(void);
0163
0164 void omap_prm_reconfigure_io_chain(void);
0165 int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
0166
0167 /*
0168  * Voltage Processor (VP) identifiers
0169  */
0170 #define OMAP3_VP_VDD_MPU_ID 0
0171 #define OMAP3_VP_VDD_CORE_ID    1
0172 #define OMAP4_VP_VDD_CORE_ID    0
0173 #define OMAP4_VP_VDD_IVA_ID 1
0174 #define OMAP4_VP_VDD_MPU_ID 2
0175
0176 u32 omap_prm_vp_check_txdone(u8 vp_id);
0177 void omap_prm_vp_clear_txdone(u8 vp_id);
0178
0179 #endif
0180
0181
0182 #endif